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Tue, 20 Jun 2017 17:04:30 +0200 From: To: , , Date: Tue, 20 Jun 2017 17:04:18 +0200 Message-ID: <1497971059-19097-2-git-send-email-patrice.chotard@st.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1497971059-19097-1-git-send-email-patrice.chotard@st.com> References: <1497971059-19097-1-git-send-email-patrice.chotard@st.com> MIME-Version: 1.0 X-Originating-IP: [10.75.127.50] X-ClientProxiedBy: SFHDAG8NODE1.st.com (10.75.127.22) To SFHDAG6NODE3.st.com (10.75.127.18) X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:, , definitions=2017-06-20_08:, , signatures=0 Cc: christophe.kerello@st.com Subject: [U-Boot] [PATCH 1/2] pinctrl: stm32: handle a configuration list X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" From: Christophe Kerello This patch handles a configuration list behind pinctrl-0 like pinctrl-0 = <&qspi_clk_a &qspi_bk1_a &qspi_bk2_a>; Signed-off-by: Christophe Kerello Acked-by: Vikas MANOCHA --- drivers/pinctrl/pinctrl_stm32.c | 51 ++++++++++++++++++++++++++++++----------- 1 file changed, 38 insertions(+), 13 deletions(-) diff --git a/drivers/pinctrl/pinctrl_stm32.c b/drivers/pinctrl/pinctrl_stm32.c index 5bee7fb..6183103 100644 --- a/drivers/pinctrl/pinctrl_stm32.c +++ b/drivers/pinctrl/pinctrl_stm32.c @@ -93,39 +93,31 @@ static int prep_gpio_ctl(struct stm32_gpio_ctl *gpio_ctl, u32 gpio_fn, int node) return 0; } -static int stm32_pinctrl_set_state_simple(struct udevice *dev, - struct udevice *periph) +static int stm32_pinctrl_config(int offset) { u32 pin_mux[MAX_PINS_ONE_IP]; - struct fdtdec_phandle_args args; int rv, len; - /* Get node pinctrl-0 */ - rv = fdtdec_parse_phandle_with_args(gd->fdt_blob, dev_of_offset(periph), - "pinctrl-0", 0, 0, 0, &args); - if (rv) - return rv; /* * check for "pinmux" property in each subnode (e.g. pins1 and pins2 for * usart1) of pin controller phandle "pinctrl-0" * */ - fdt_for_each_subnode(args.node, gd->fdt_blob, args.node) { + fdt_for_each_subnode(offset, gd->fdt_blob, offset) { struct stm32_gpio_dsc gpio_dsc; struct stm32_gpio_ctl gpio_ctl; int i; - len = fdtdec_get_int_array_count(gd->fdt_blob, args.node, + len = fdtdec_get_int_array_count(gd->fdt_blob, offset, "pinmux", pin_mux, ARRAY_SIZE(pin_mux)); - debug("%s: periph->name = %s, no of pinmux entries= %d\n", - __func__, periph->name, len); + debug("%s: no of pinmux entries= %d\n", __func__, len); if (len < 0) return -EINVAL; for (i = 0; i < len; i++) { struct gpio_desc desc; debug("%s: pinmux = %x\n", __func__, *(pin_mux + i)); prep_gpio_dsc(&gpio_dsc, *(pin_mux + i)); - prep_gpio_ctl(&gpio_ctl, *(pin_mux + i), args.node); + prep_gpio_ctl(&gpio_ctl, *(pin_mux + i), offset); rv = uclass_get_device_by_seq(UCLASS_GPIO, gpio_dsc.port, &desc.dev); if (rv) @@ -141,6 +133,39 @@ static int stm32_pinctrl_set_state_simple(struct udevice *dev, return 0; } +static int stm32_pinctrl_set_state_simple(struct udevice *dev, + struct udevice *periph) +{ + const void *fdt = gd->fdt_blob; + const fdt32_t *list; + uint32_t phandle; + int config_node; + int size, i, ret; + + list = fdt_getprop(fdt, dev_of_offset(periph), "pinctrl-0", &size); + if (!list) + return -EINVAL; + + debug("%s: periph->name = %s\n", __func__, periph->name); + + size /= sizeof(*list); + for (i = 0; i < size; i++) { + phandle = fdt32_to_cpu(*list++); + + config_node = fdt_node_offset_by_phandle(fdt, phandle); + if (config_node < 0) { + error("prop pinctrl-0 index %d invalid phandle\n", i); + return -EINVAL; + } + + ret = stm32_pinctrl_config(config_node); + if (ret) + return ret; + } + + return 0; +} + static struct pinctrl_ops stm32_pinctrl_ops = { .set_state_simple = stm32_pinctrl_set_state_simple, };