diff mbox

[U-Boot,v2,2/4] rockchip: pinctrl: rk3328: use gpio instead of sdmmc-pwren

Message ID 1496907127-30030-2-git-send-email-kever.yang@rock-chips.com
State Accepted
Delegated to: Philipp Tomsich
Headers show

Commit Message

Kever Yang June 8, 2017, 7:32 a.m. UTC 
SDMMC-PWREN is a pin to control voltage for SDMMC IO, it may
be high active or low active, the dwmmc driver always assume
the sdmmc-pwren as high active.

Kernel treat this pin as fixed regulator instead of a pin from
controller, and then it can set in dts file upon board schematic,
that's a good solution, we can also do this in u-boot.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
---

Changes in v2: None

 drivers/pinctrl/rockchip/pinctrl_rk3328.c | 6 ++----
 1 file changed, 2 insertions(+), 4 deletions(-)

Comments

Philipp Tomsich June 25, 2017, 11:23 p.m. UTC | #1 
> SDMMC-PWREN is a pin to control voltage for SDMMC IO, it may
> be high active or low active, the dwmmc driver always assume
> the sdmmc-pwren as high active.
> 
> Kernel treat this pin as fixed regulator instead of a pin from
> controller, and then it can set in dts file upon board schematic,
> that's a good solution, we can also do this in u-boot.
> 
> Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
> Acked-by: Simon Glass <sjg@chromium.org>
> ---
> 
> Changes in v2: None
> 
>  drivers/pinctrl/rockchip/pinctrl_rk3328.c | 6 ++----
>  1 file changed, 2 insertions(+), 4 deletions(-)
> 

Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Philipp Tomsich June 26, 2017, 4:14 p.m. UTC | #2 
> SDMMC-PWREN is a pin to control voltage for SDMMC IO, it may
> be high active or low active, the dwmmc driver always assume
> the sdmmc-pwren as high active.
> 
> Kernel treat this pin as fixed regulator instead of a pin from
> controller, and then it can set in dts file upon board schematic,
> that's a good solution, we can also do this in u-boot.
> 
> Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
> Acked-by: Simon Glass <sjg@chromium.org>
> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
> ---
> 
> Changes in v2: None
> 
>  drivers/pinctrl/rockchip/pinctrl_rk3328.c | 6 ++----
>  1 file changed, 2 insertions(+), 4 deletions(-)
> 

Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Philipp Tomsich July 4, 2017, 7:56 a.m. UTC | #3 
> SDMMC-PWREN is a pin to control voltage for SDMMC IO, it may
> be high active or low active, the dwmmc driver always assume
> the sdmmc-pwren as high active.
> 
> Kernel treat this pin as fixed regulator instead of a pin from
> controller, and then it can set in dts file upon board schematic,
> that's a good solution, we can also do this in u-boot.
> 
> Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
> Acked-by: Simon Glass <sjg@chromium.org>
> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
> ---
> 
> Changes in v2: None
> 
>  drivers/pinctrl/rockchip/pinctrl_rk3328.c | 6 ++----
>  1 file changed, 2 insertions(+), 4 deletions(-)
> 

Applied to u-boot-rockchip/next, thanks!
diff mbox

Patch

diff --git a/drivers/pinctrl/rockchip/pinctrl_rk3328.c b/drivers/pinctrl/rockchip/pinctrl_rk3328.c
index d0ffeb1..f3e7eec 100644
--- a/drivers/pinctrl/rockchip/pinctrl_rk3328.c
+++ b/drivers/pinctrl/rockchip/pinctrl_rk3328.c
@@ -184,13 +184,11 @@  static void pinctrl_rk3328_sdmmc_config(struct rk3328_grf_regs *grf,
 		if (com_iomux & IOMUX_SEL_SDMMC_MASK)
 			rk_clrsetreg(&grf->gpio0d_iomux,
 				     GPIO0D6_SEL_MASK,
-				     GPIO0D6_SDMMC0_PWRENM1
-				     << GPIO0D6_SEL_SHIFT);
+				     GPIO0D6_GPIO << GPIO0D6_SEL_SHIFT);
 		else
 			rk_clrsetreg(&grf->gpio2a_iomux,
 				     GPIO2A7_SEL_MASK,
-				     GPIO2A7_SDMMC0_PWRENM0
-				     << GPIO2A7_SEL_SHIFT);
+				     GPIO2A7_GPIO << GPIO2A7_SEL_SHIFT);
 		rk_clrsetreg(&grf->gpio1a_iomux,
 			     GPIO1A0_SEL_MASK,
 			     GPIO1A0_CARD_DATA_CLK_CMD_DETN