| Message ID | 1496774687-32611-4-git-send-email-philipp.tomsich@theobroma-systems.com |
|---|---|
| State | Accepted |
| Commit | cf35242a3e6e15c36150c132b3da8032fa21f91b |
| Delegated to: | Simon Glass |
| Headers | show |
On 6 June 2017 at 12:44, Philipp Tomsich <philipp.tomsich@theobroma-systems.com> wrote: > This adds the DDR3-1866 timing via its own DTS and wires it up. This > (currently) is not the default timing for the RK3399-Q7 and should be > selected explicitly via the config (CONFIG_DEFAULT_DEVICE_TREE). > > Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> > > --- > > Changes in v2: > - added rk3399-puma-ddr1866 DTS file for the DDR3-1866 implementation > (replacing the #ifdef implementation) > > arch/arm/dts/Makefile | 1 + > arch/arm/dts/rk3399-puma-ddr1866.dts | 11 +++++++++++ > 2 files changed, 12 insertions(+) > create mode 100644 arch/arm/dts/rk3399-puma-ddr1866.dts > Acked-by: Simon Glass <sjg@chromium.org>
On 6 June 2017 at 12:44, Philipp Tomsich <philipp.tomsich@theobroma-systems.com> wrote: > This adds the DDR3-1866 timing via its own DTS and wires it up. This > (currently) is not the default timing for the RK3399-Q7 and should be > selected explicitly via the config (CONFIG_DEFAULT_DEVICE_TREE). > > Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> > > --- > > Changes in v2: > - added rk3399-puma-ddr1866 DTS file for the DDR3-1866 implementation > (replacing the #ifdef implementation) > > arch/arm/dts/Makefile | 1 + > arch/arm/dts/rk3399-puma-ddr1866.dts | 11 +++++++++++ > 2 files changed, 12 insertions(+) > create mode 100644 arch/arm/dts/rk3399-puma-ddr1866.dts > Acked-by: Simon Glass <sjg@chromium.org> Applied to u-boot-rockchip, thanks!
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 37962e2..16ee8f2 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -45,6 +45,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += \ rk3399-firefly.dtb \ rk3399-puma-ddr1333.dtb \ rk3399-puma-ddr1600.dtb \ + rk3399-puma-ddr1866.dtb \ rv1108-evb.dtb dtb-$(CONFIG_ARCH_MESON) += \ meson-gxbb-odroidc2.dtb diff --git a/arch/arm/dts/rk3399-puma-ddr1866.dts b/arch/arm/dts/rk3399-puma-ddr1866.dts new file mode 100644 index 0000000..4eec8e7 --- /dev/null +++ b/arch/arm/dts/rk3399-puma-ddr1866.dts @@ -0,0 +1,11 @@ +/* + * (C) Copyright 2017 Theobroma Systems Design und Consulting GmbH + * + * SPDX-License-Identifier: GPL-2.0+ X11 + */ + +/dts-v1/; + +#include "rk3399-puma.dtsi" +#include "rk3399-sdram-ddr3-1866.dtsi" +
This adds the DDR3-1866 timing via its own DTS and wires it up. This (currently) is not the default timing for the RK3399-Q7 and should be selected explicitly via the config (CONFIG_DEFAULT_DEVICE_TREE). Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> --- Changes in v2: - added rk3399-puma-ddr1866 DTS file for the DDR3-1866 implementation (replacing the #ifdef implementation) arch/arm/dts/Makefile | 1 + arch/arm/dts/rk3399-puma-ddr1866.dts | 11 +++++++++++ 2 files changed, 12 insertions(+) create mode 100644 arch/arm/dts/rk3399-puma-ddr1866.dts