From patchwork Tue May 23 06:25:01 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Chee, Tien Fong" X-Patchwork-Id: 765765 X-Patchwork-Delegate: marek.vasut@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 3wX5Bs0mYjz9sP0 for ; Tue, 23 May 2017 16:26:13 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id C4BF0C21C5E; Tue, 23 May 2017 06:25:52 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=-5.0 required=5.0 tests=RCVD_IN_DNSWL_HI autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id E0B30C21C99; Tue, 23 May 2017 06:25:26 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 1CD16C21C68; Tue, 23 May 2017 06:25:19 +0000 (UTC) Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by lists.denx.de (Postfix) with ESMTPS id BBD45C21C68 for ; Tue, 23 May 2017 06:25:14 +0000 (UTC) Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by fmsmga103.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 22 May 2017 23:25:14 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.38,380,1491289200"; d="scan'208";a="265234996" Received: from tfchee-mobl.gar.corp.intel.com (HELO tienfong.fm.intel.com, ) ([10.226.249.184]) by fmsmga004.fm.intel.com with ESMTP; 22 May 2017 23:25:12 -0700 From: tien.fong.chee@intel.com To: u-boot@lists.denx.de Date: Tue, 23 May 2017 14:25:01 +0800 Message-Id: <1495520703-23846-4-git-send-email-tien.fong.chee@intel.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1495520703-23846-1-git-send-email-tien.fong.chee@intel.com> References: <1495520703-23846-1-git-send-email-tien.fong.chee@intel.com> Cc: Marek Vasut , Tien Fong Chee , Ching Liang See , Tien Fong , Westergteen Dalon Subject: [U-Boot] [PATCH v5 3/5] arm: socfpga: Enable FPGA driver on SPL X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" From: Tien Fong Chee Enable FPGA driver build for SPL. FPGA driver is needed for SPL to configure and getting DDR up before loading U-boot into DDR and booting from there. Signed-off-by: Tien Fong Chee --- drivers/Makefile | 1 + include/configs/socfpga_common.h | 1 + 2 files changed, 2 insertions(+) diff --git a/drivers/Makefile b/drivers/Makefile index 4a4b237..bb35c9a 100644 --- a/drivers/Makefile +++ b/drivers/Makefile @@ -47,6 +47,7 @@ obj-$(CONFIG_OMAP_USB_PHY) += usb/phy/ obj-$(CONFIG_SPL_SATA_SUPPORT) += block/ obj-$(CONFIG_SPL_USB_HOST_SUPPORT) += block/ obj-$(CONFIG_SPL_MMC_SUPPORT) += block/ +obj-$(CONFIG_SPL_FPGA_SUPPORT) += fpga/ endif ifdef CONFIG_TPL_BUILD diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h index da7e4ad..e74e7eb 100644 --- a/include/configs/socfpga_common.h +++ b/include/configs/socfpga_common.h @@ -110,6 +110,7 @@ #define CONFIG_FPGA #define CONFIG_FPGA_ALTERA #define CONFIG_FPGA_SOCFPGA +#define CONFIG_SPL_FPGA_SUPPORT #define CONFIG_FPGA_COUNT 1 #endif #endif