From patchwork Wed May 17 03:44:46 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kever Yang X-Patchwork-Id: 763323 X-Patchwork-Delegate: sjg@chromium.org Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 3wSLKs6xTZz9s7M for ; Wed, 17 May 2017 14:04:17 +1000 (AEST) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="AoYL8njN"; dkim-atps=neutral Received: by lists.denx.de (Postfix, from userid 105) id AA441C2240A; Wed, 17 May 2017 03:49:36 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H2, T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id CFEE3C22460; Wed, 17 May 2017 03:48:27 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id C430EC2246D; Wed, 17 May 2017 03:45:05 +0000 (UTC) Received: from mail-pf0-f195.google.com (mail-pf0-f195.google.com [209.85.192.195]) by lists.denx.de (Postfix) with ESMTPS id 0CED6C2246D for ; Wed, 17 May 2017 03:45:05 +0000 (UTC) Received: by mail-pf0-f195.google.com with SMTP id f27so114116pfe.0 for ; Tue, 16 May 2017 20:45:04 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references; bh=ntmpFk54sNYBszs90eM+D/gOVazotHSKyYSIpf5cCD4=; b=AoYL8njNPfZlJQR8K/D3EDrTtrX6TLte4rBov+Yaj0KAtC9Vxwn7dvX8YX44R+Oey8 1gMupYvTUfjfdRIzbhRbXalh5VVK0jf6iXAinKlOMPx8RC8Vo+U+Y+zVq77QBvXtnH/B 7UJgrbhjJDyp+CnJsMj5JenbKXEghhwPgc6IIXs69x3t/I1TwCxQx76VY4WKFlN6pf/v mDTin8DYy1c+5A6Mt/nAYkIjjKT8+kn2Y2b3DDcuq9Hu8Vjom8rL+MhNJf4cVROyFWxX KTg8cR66BBVoM1ynRtWiMKosGN7wukFbHAqly6HGTUTZKMskCFnOZM6Qxyby9hIRYo0M IeUg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references; bh=ntmpFk54sNYBszs90eM+D/gOVazotHSKyYSIpf5cCD4=; b=D7VkZ4RRcuWwEQ820cY5kCbgYPt0Tf/t3aQ9oiJh4ScUo8fF/5kmbeXFyzNSvVMQyn nZgIoI/I4n48XawHuid7knwgl5Ojx6DATR/0LSNtYelfbVgPxzA7oZEnyGkHqGBNWfL0 JtqmWoKOir3VcXvftYveFtVB5tgwtMUCyBFIcqc9WpHhV+nfJHTOVeW4aGHCLc5RshyF G0Bar7jPzAdDFLn/OZO7ALmDQJADfoiFo5Tbe042kdf6yYWYv3xxG/tnTkpgmzVg2N44 X51i532eOiDJ+nLhACzrVg7ONlklhT6ookN6ifjLXOtsqvhUnsdDawoVYs1sAmduev// 8SXA== X-Gm-Message-State: AODbwcARo0E5mPLeM7qIKbbflp/mbxACV7+Dyl235mnsozzpCc7kcPIb j5XrjPploQwl2g== X-Received: by 10.99.44.82 with SMTP id s79mr1460440pgs.219.1494992703745; Tue, 16 May 2017 20:45:03 -0700 (PDT) Received: from localhost.localdomain ([103.29.142.67]) by smtp.gmail.com with ESMTPSA id o20sm791226pfa.96.2017.05.16.20.45.01 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 16 May 2017 20:45:03 -0700 (PDT) From: Kever Yang To: sjg@chromium.org Date: Wed, 17 May 2017 11:44:46 +0800 Message-Id: <1494992688-19180-5-git-send-email-kever.yang@rock-chips.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1494992688-19180-1-git-send-email-kever.yang@rock-chips.com> References: <1494992688-19180-1-git-send-email-kever.yang@rock-chips.com> Cc: u-boot@lists.denx.de, Lin huang , William Zhang Subject: [U-Boot] [PATCH 4/6] rockchip: pinctrl: rk3328: use gpio instead of sdmmc-pwren X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" SDMMC-PWREN is a pin to control voltage for SDMMC IO, it may be high active or low active, the dwmmc driver always assume the sdmmc-pwren as high active. Kernel treat this pin as fixed regulator instead of a pin from controller, and then it can set in dts file upon board schematic, that's a good solution, we can also do this in u-boot. Signed-off-by: Kever Yang Acked-by: Simon Glass --- drivers/pinctrl/rockchip/pinctrl_rk3328.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/drivers/pinctrl/rockchip/pinctrl_rk3328.c b/drivers/pinctrl/rockchip/pinctrl_rk3328.c index 716d02a..0995d9f 100644 --- a/drivers/pinctrl/rockchip/pinctrl_rk3328.c +++ b/drivers/pinctrl/rockchip/pinctrl_rk3328.c @@ -184,13 +184,11 @@ static void pinctrl_rk3328_sdmmc_config(struct rk3328_grf_regs *grf, if (com_iomux & IOMUX_SEL_SDMMC_MASK) rk_clrsetreg(&grf->gpio0d_iomux, GPIO0D6_SEL_MASK, - GPIO0D6_SDMMC0_PWRENM1 - << GPIO0D6_SEL_SHIFT); + GPIO0D6_GPIO << GPIO0D6_SEL_SHIFT); else rk_clrsetreg(&grf->gpio2a_iomux, GPIO2A7_SEL_MASK, - GPIO2A7_SDMMC0_PWRENM0 - << GPIO2A7_SEL_SHIFT); + GPIO2A7_GPIO << GPIO2A7_SEL_SHIFT); rk_clrsetreg(&grf->gpio1a_iomux, GPIO1A0_SEL_MASK, GPIO1A0_CARD_DATA_CLK_CMD_DETN