From patchwork Fri Apr 28 15:11:55 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Philipp Tomsich X-Patchwork-Id: 756457 X-Patchwork-Delegate: sjg@chromium.org Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 3wDy6Y3mLfz9s7w for ; Sat, 29 Apr 2017 01:15:01 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id 3D93BC21C7A; Fri, 28 Apr 2017 15:13:30 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=none autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 0CAE4C21C59; Fri, 28 Apr 2017 15:12:13 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id AFA10C21C28; Fri, 28 Apr 2017 15:12:09 +0000 (UTC) Received: from mail.theobroma-systems.com (vegas.theobroma-systems.com [144.76.126.164]) by lists.denx.de (Postfix) with ESMTPS id 77F9EC21C2D for ; Fri, 28 Apr 2017 15:12:09 +0000 (UTC) Received: from [86.59.122.178] (port=34051 helo=android.lan) by mail.theobroma-systems.com with esmtpsa (TLS1.2:DHE_RSA_AES_256_CBC_SHA256:256) (Exim 4.80) (envelope-from ) id 1d47Yz-000309-8J; Fri, 28 Apr 2017 17:12:05 +0200 From: Philipp Tomsich To: u-boot@lists.denx.de Date: Fri, 28 Apr 2017 17:11:55 +0200 Message-Id: <1493392319-52041-2-git-send-email-philipp.tomsich@theobroma-systems.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1493392319-52041-1-git-send-email-philipp.tomsich@theobroma-systems.com> References: <1493392319-52041-1-git-send-email-philipp.tomsich@theobroma-systems.com> Cc: Jacob Chen , Klaus Goger , Philipp Tomsich , Lin huang Subject: [U-Boot] [PATCH v2 1/5] rockchip: clk: rk3399: allow requests for PCLK_EFUSE1024NS X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" The (non-secure) efuse node in the DTS requests PCLK_EFUSE1024NS. To allow us to add a efuse-driver (and more importantly, to allow probes of such a driver to succeed), we need need to accept requests for PCLK_EFUSE1024NS and return a non-error result. As PCLK_EFUSE1024NS is enabled by default (i.e. after reset), we don't implement any logic to manage this clock gate and simply assume that the reset-default has not been changed. Signed-off-by: Philipp Tomsich Tested-by: Klaus Goger Reviewed-by: Simon Glass Reviewed-by: Simon Glass --- Changes in v2: None drivers/clk/rockchip/clk_rk3399.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/clk/rockchip/clk_rk3399.c b/drivers/clk/rockchip/clk_rk3399.c index 72395e2..4dbc1b0 100644 --- a/drivers/clk/rockchip/clk_rk3399.c +++ b/drivers/clk/rockchip/clk_rk3399.c @@ -882,6 +882,8 @@ static ulong rk3399_clk_get_rate(struct clk *clk) case DCLK_VOP0: case DCLK_VOP1: break; + case PCLK_EFUSE1024NS: + break; default: return -ENOENT; } @@ -923,6 +925,8 @@ static ulong rk3399_clk_set_rate(struct clk *clk, ulong rate) case SCLK_DDRCLK: ret = rk3399_ddr_set_clk(priv->cru, rate); break; + case PCLK_EFUSE1024NS: + break; default: return -ENOENT; }