From patchwork Sun Apr 9 06:52:23 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jagan Teki X-Patchwork-Id: 748697 X-Patchwork-Delegate: sbabic@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 3w13yk5Fd0z9s7m for ; Sun, 9 Apr 2017 16:57:02 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id 5FB64C21D18; Sun, 9 Apr 2017 06:55:59 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=-0.0 required=5.0 tests=RCVD_IN_MSPIKE_H3, RCVD_IN_MSPIKE_WL autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 7995AC21CE5; Sun, 9 Apr 2017 06:55:45 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 1A84EC21CE8; Sun, 9 Apr 2017 06:55:31 +0000 (UTC) Received: from mail-pg0-f67.google.com (mail-pg0-f67.google.com [74.125.83.67]) by lists.denx.de (Postfix) with ESMTPS id 95F02C21C56 for ; Sun, 9 Apr 2017 06:55:24 +0000 (UTC) Received: by mail-pg0-f67.google.com with SMTP id o123so21935184pga.1 for ; Sat, 08 Apr 2017 23:55:24 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=q+mUseHR3VAL0kGwgFj8DFLjKq5rVhr1zOP1w6NfBfk=; b=rLvQ/qMPPFurVA2EoNeFcAYsYUyt0u8ZQ/0oJL39Op8LMqzAM1aOs6dZOsP4GHsFJX ZKcrI7EYdejKVHHx+sV+Ekw2QIFVffEAwW1nqWIKxlde2D4tYixfmA+RIUbvV4QW5z9/ j/eCZFdkkwJww3Pm51uK3VaWBbCfQU6c9OTdf9NyExcfcF6JguHbGd/G8cXXFkbz0lHQ hknzrbl6lWPi8RMvgNvFIBQId2QlhgrCHPYuW43dezDj1+ytW/VUzxjm0mc6vrPyGZVf DYmIqLs138g8WyJ6z9xYMIiMiWARUcmArpjDVK2EscFEyfJ+VJN9fNM89Ok4WYaVllG4 vMDA== X-Gm-Message-State: AFeK/H109zbvNlwA2YrOHoA/A5NmljtIyPq+0eZth1k+szHmjXZtZs+e20V57dxLMAJBzw== X-Received: by 10.98.202.80 with SMTP id n77mr48548713pfg.167.1491720923328; Sat, 08 Apr 2017 23:55:23 -0700 (PDT) Received: from localhost.localdomain ([117.254.77.247]) by smtp.gmail.com with ESMTPSA id e76sm17804207pfk.75.2017.04.08.23.55.20 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Sat, 08 Apr 2017 23:55:22 -0700 (PDT) From: Jagan Teki To: Stefano Babic Date: Sun, 9 Apr 2017 12:22:23 +0530 Message-Id: <1491720776-7445-3-git-send-email-jagan@openedev.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1491720776-7445-1-git-send-email-jagan@openedev.com> References: <1491720776-7445-1-git-send-email-jagan@openedev.com> Cc: Fabio Estevam , u-boot@lists.denx.de Subject: [U-Boot] [PATCH v4 02/35] ARM: dts: i.MX6: Add imx6qdl-sabresd.dtsi X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" From: Jagan Teki Add common minimal dtsi file for i.MX6QDL Sabresd boards, - uart1 - usdhc2 - usdhc3 - usdhc4 Cc: Stefano Babic Cc: Fabio Estevam Cc: Michael Trimarchi Signed-off-by: Jagan Teki --- Changes for v4, v3, v2: - none arch/arm/dts/imx6qdl-sabresd.dtsi | 111 ++++++++++++++++++++++++++++++++++++++ 1 file changed, 111 insertions(+) create mode 100644 arch/arm/dts/imx6qdl-sabresd.dtsi diff --git a/arch/arm/dts/imx6qdl-sabresd.dtsi b/arch/arm/dts/imx6qdl-sabresd.dtsi new file mode 100644 index 0000000..1846274 --- /dev/null +++ b/arch/arm/dts/imx6qdl-sabresd.dtsi @@ -0,0 +1,111 @@ +/* + * Copyright 2012 Freescale Semiconductor, Inc. + * Copyright 2011 Linaro Ltd. + * + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#include + +/ { + chosen { + stdout-path = &uart1; + }; + + memory { + reg = <0x10000000 0x40000000>; + }; +}; + +&uart1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart1>; + status = "okay"; +}; + +&usdhc2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usdhc2>; + bus-width = <8>; + cd-gpios = <&gpio2 2 GPIO_ACTIVE_LOW>; + wp-gpios = <&gpio2 3 GPIO_ACTIVE_HIGH>; + status = "okay"; +}; + +&usdhc3 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usdhc3>; + bus-width = <8>; + cd-gpios = <&gpio2 0 GPIO_ACTIVE_LOW>; + wp-gpios = <&gpio2 1 GPIO_ACTIVE_HIGH>; + status = "okay"; +}; + +&usdhc4 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usdhc4>; + bus-width = <8>; + non-removable; + no-1-8-v; + status = "okay"; +}; + +&iomuxc { + pinctrl_uart1: uart1grp { + fsl,pins = < + MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b1 + MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1 + >; + }; + + + pinctrl_usdhc2: usdhc2grp { + fsl,pins = < + MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059 + MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059 + MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059 + MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059 + MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059 + MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059 + MX6QDL_PAD_NANDF_D4__SD2_DATA4 0x17059 + MX6QDL_PAD_NANDF_D5__SD2_DATA5 0x17059 + MX6QDL_PAD_NANDF_D6__SD2_DATA6 0x17059 + MX6QDL_PAD_NANDF_D7__SD2_DATA7 0x17059 + >; + }; + + pinctrl_usdhc3: usdhc3grp { + fsl,pins = < + MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059 + MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059 + MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059 + MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059 + MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059 + MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059 + MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x17059 + MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x17059 + MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x17059 + MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x17059 + >; + }; + + pinctrl_usdhc4: usdhc4grp { + fsl,pins = < + MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17059 + MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10059 + MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17059 + MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17059 + MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17059 + MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17059 + MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x17059 + MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x17059 + MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x17059 + MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x17059 + >; + }; +};