From patchwork Fri Mar 3 12:50:27 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Chee, Tien Fong" X-Patchwork-Id: 735059 X-Patchwork-Delegate: marek.vasut@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 3vZTcR0YxZz9s81 for ; Fri, 3 Mar 2017 23:52:55 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id B98B7C21D70; Fri, 3 Mar 2017 12:52:44 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=-0.0 required=5.0 tests=RCVD_IN_MSPIKE_H3, RCVD_IN_MSPIKE_WL autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 3AD79C21D7B; Fri, 3 Mar 2017 12:52:15 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id C63ADC21D7B; Fri, 3 Mar 2017 12:52:13 +0000 (UTC) Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by lists.denx.de (Postfix) with ESMTPS id CD9C8C21D7B for ; Fri, 3 Mar 2017 12:52:04 +0000 (UTC) Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by orsmga103.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 03 Mar 2017 04:52:03 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos; i="5.35,237,1484035200"; d="scan'208"; a="1118004572" Received: from unknown (HELO chee-tien-fong.png.intel.com) ([10.226.250.54]) by fmsmga001.fm.intel.com with ESMTP; 03 Mar 2017 04:52:00 -0800 From: Chee Tien Fong To: u-boot@lists.denx.de Date: Fri, 3 Mar 2017 20:50:27 +0800 Message-Id: <1488545428-3486-4-git-send-email-tien.fong.chee@intel.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1488545428-3486-1-git-send-email-tien.fong.chee@intel.com> References: <1488545428-3486-1-git-send-email-tien.fong.chee@intel.com> Cc: Marek Vasut , Tien Fong Chee , Ching Liang See , Dinh Nguyen , Westergreen Dalon Subject: [U-Boot] [PATCH 3/4] arm: socfpga: Add Arria10 FPGA manager program assembly driver X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" From: Tien Fong Chee This patch adding the Arria10 FPGA manager program assembly driver which can be used for feeding bitstream to configure FPGA. Signed-off-by: Tien Fong Chee Cc: Marek Vasut Cc: Dinh Nguyen Cc: Ching Liang See Cc: Ley Foon Cc: Westergreen Dalon --- arch/arm/mach-socfpga/lowlevel_init.S | 48 +++++++++++++++++++++++++++++++++ 1 files changed, 48 insertions(+), 0 deletions(-) create mode 100644 arch/arm/mach-socfpga/lowlevel_init.S diff --git a/arch/arm/mach-socfpga/lowlevel_init.S b/arch/arm/mach-socfpga/lowlevel_init.S new file mode 100644 index 0000000..79e9d07 --- /dev/null +++ b/arch/arm/mach-socfpga/lowlevel_init.S @@ -0,0 +1,48 @@ +/* + * Copyright (C) 2017 Intel Corporation + * + * SPDX-License-Identifier: GPL-2.0 + */ + +#include +#include +#include + +/* + * Write RBF data in burst form to FPGA Manager + * [r0] RBF binary source address + * [r1] FPGA Manager data address + * [r2] RBF data length + */ + +ENTRY(fpgamgr_axi_write) + PUSH {r4-r11, lr} /* save registers per AAPCS */ + +write_burst: + cmp r2,#32 + beq write_burst_cont + bls write_word +write_burst_cont: + ldmia r0!, {r4-r11} + stmia r1, {r4-r11} + subs r2, r2, #32 + b write_burst + +write_word: + cmp r2,#4 + beq write_word_cont + bls write_byte +write_word_cont: + ldmia r0!, {r4} + stmia r1, {r4} + subs r2, r2, #4 + b write_word + +write_byte: + cmp r2,#0 + beq write_end + ldr r3, [r0] + str r3, [r1] +write_end: + POP {r4-r11, pc} +ENDPROC(fpgamgr_axi_write)