From patchwork Tue Feb 7 15:45:16 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jean-Jacques Hiblot X-Patchwork-Id: 725209 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 3vHpbW6HKBz9s7f for ; Wed, 8 Feb 2017 02:46:15 +1100 (AEDT) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 830894B578; Tue, 7 Feb 2017 16:46:14 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 1U0HTA3V1xrg; Tue, 7 Feb 2017 16:46:14 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id E18194B105; Tue, 7 Feb 2017 16:46:13 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id D559F4B1FE for ; Tue, 7 Feb 2017 16:46:10 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id acv0R1vGpjtp for ; Tue, 7 Feb 2017 16:46:10 +0100 (CET) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from fllnx209.ext.ti.com (fllnx209.ext.ti.com [198.47.19.16]) by theia.denx.de (Postfix) with ESMTPS id 61BFF4ABD8 for ; Tue, 7 Feb 2017 16:46:06 +0100 (CET) Received: from dflxv15.itg.ti.com ([128.247.5.124]) by fllnx209.ext.ti.com (8.15.1/8.15.1) with ESMTP id v17FjTDk019981; Tue, 7 Feb 2017 09:45:29 -0600 Received: from DLEE71.ent.ti.com (dlee71.ent.ti.com [157.170.170.114]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id v17FjOwT004742; Tue, 7 Feb 2017 09:45:24 -0600 Received: from dlep33.itg.ti.com (157.170.170.75) by DLEE71.ent.ti.com (157.170.170.114) with Microsoft SMTP Server id 14.3.294.0; Tue, 7 Feb 2017 09:45:23 -0600 Received: from localhost (ileax41-snat.itg.ti.com [10.172.224.153]) by dlep33.itg.ti.com (8.14.3/8.13.8) with ESMTP id v17FjNTs026789; Tue, 7 Feb 2017 09:45:23 -0600 From: Jean-Jacques Hiblot To: , , , , Date: Tue, 7 Feb 2017 16:45:16 +0100 Message-ID: <1486482317-5798-3-git-send-email-jjhiblot@ti.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1486482317-5798-1-git-send-email-jjhiblot@ti.com> References: <1486482317-5798-1-git-send-email-jjhiblot@ti.com> MIME-Version: 1.0 Cc: Jean-Jacques Hiblot Subject: [U-Boot] [PATCH 2/3] drivers: ti_qspi: use syscon to get the address ctrl_mod_mmap register X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.15 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" We used to get the address of the optionnal ctrl_mod_mmap register as the third memory range of the "reg" property. the linux driver moved to use a syscon instead. In order to keep the DTS as close as possible to that of linux, we move to using a syscon as well. If CONFIG_SYSCON is no set, the driver reverts to the old way of getting the address from the 3rd memory range Signed-off-by: Jean-Jacques Hiblot Reviewed-by: Simon Glass --- drivers/spi/ti_qspi.c | 47 ++++++++++++++++++++++++++++++++++++++++++----- 1 file changed, 42 insertions(+), 5 deletions(-) diff --git a/drivers/spi/ti_qspi.c b/drivers/spi/ti_qspi.c index 6f9f983..d964b50 100644 --- a/drivers/spi/ti_qspi.c +++ b/drivers/spi/ti_qspi.c @@ -17,6 +17,8 @@ #include #include #include +#include +#include DECLARE_GLOBAL_DATA_PTR; @@ -549,21 +551,56 @@ static int ti_qspi_probe(struct udevice *bus) return 0; } +static void *map_syscon_chipselects(struct udevice *bus) +{ +#if defined(CONFIG_SYSCON) && !defined(CONFIG_SPL_BUILD) + struct udevice *syscon; + struct regmap *regmap; + const fdt32_t *cell; + int len, err; + + err = uclass_get_device_by_phandle(UCLASS_SYSCON, bus, + "syscon-chipselects", &syscon); + if (err) { + debug("%s: unable to find syscon device (%d)\n", __func__, + err); + return NULL; + } + + regmap = syscon_get_regmap(syscon); + if (IS_ERR(regmap)) { + debug("%s: unable to find regmap (%ld)\n", __func__, + PTR_ERR(regmap)); + return NULL; + } + + cell = fdt_getprop(gd->fdt_blob, bus->of_offset, "syscon-chipselects", + &len); + if (len < 2*sizeof(fdt32_t)) { + debug("%s: offset not available\n", __func__); + return NULL; + } + + return fdtdec_get_number(cell + 1, 1) + regmap_get_range(regmap, 0); +#else + fdt_addr_t addr; + addr = dev_get_addr_index(bus, 2); + return (addr == FDT_ADDR_T_NONE) ? NULL : + map_physmem(addr, 0, MAP_NOCACHE); +#endif +} + static int ti_qspi_ofdata_to_platdata(struct udevice *bus) { struct ti_qspi_priv *priv = dev_get_priv(bus); const void *blob = gd->fdt_blob; int node = bus->of_offset; - fdt_addr_t addr; - void *mmap; + priv->ctrl_mod_mmap = map_syscon_chipselects(bus); priv->base = map_physmem(dev_get_addr(bus), sizeof(struct ti_qspi_regs), MAP_NOCACHE); priv->memory_map = map_physmem(dev_get_addr_index(bus, 1), 0, MAP_NOCACHE); - addr = dev_get_addr_index(bus, 2); - mmap = map_physmem(dev_get_addr_index(bus, 2), 0, MAP_NOCACHE); - priv->ctrl_mod_mmap = (addr == FDT_ADDR_T_NONE) ? NULL : mmap; priv->max_hz = fdtdec_get_int(blob, node, "spi-max-frequency", -1); if (priv->max_hz < 0) {