From patchwork Tue Jan 17 15:27:31 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Herbrechtsmeier Dr.-Ing. , Stefan" X-Patchwork-Id: 716245 X-Patchwork-Delegate: monstr@monstr.eu Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 3v2vDQ3vFkz9sCX for ; Wed, 18 Jan 2017 02:29:58 +1100 (AEDT) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id DBF29B38D0; Tue, 17 Jan 2017 16:29:54 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id Ql__Btpniv6U; Tue, 17 Jan 2017 16:29:54 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 9A48BB38DD; Tue, 17 Jan 2017 16:29:49 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 9069EB38BA for ; Tue, 17 Jan 2017 16:29:42 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id gUE7-ei4EvvZ for ; Tue, 17 Jan 2017 16:29:42 +0100 (CET) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail2.weidmueller.de (mail2.weidmueller.de [217.244.7.241]) by theia.denx.de (Postfix) with ESMTP id 5EE1EB38B4 for ; Tue, 17 Jan 2017 16:29:41 +0100 (CET) Received: from SRVDE354.weidmueller.com (unknown [10.1.23.126]) by mail2.weidmueller.de with smtp id 52ec_586e_c91cd933_315f_4663_af60_59a2183f3c70; Tue, 17 Jan 2017 16:29:39 +0100 Received: from w010094-VirtualBox.weidmueller.com (10.1.94.106) by SRVDE354.weidmueller.com (10.1.23.126) with Microsoft SMTP Server id 14.3.294.0; Tue, 17 Jan 2017 16:29:29 +0100 From: To: Date: Tue, 17 Jan 2017 16:27:31 +0100 Message-ID: <1484666853-19282-9-git-send-email-stefan.herbrechtsmeier@weidmueller.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1484666853-19282-1-git-send-email-stefan.herbrechtsmeier@weidmueller.com> References: <1484666853-19282-1-git-send-email-stefan.herbrechtsmeier@weidmueller.com> MIME-Version: 1.0 X-NAIMIME-Disclaimer: 1 X-NAIMIME-Modified: 1 X-NAI-Spam-Flag: NO X-NAI-Spam-Threshold: 4 X-NAI-Spam-Score: 0 X-NAI-Spam-Version: 2.3.0.9418 : core <5922> : inlines <5632> : streams <1729480> : uri <2359648> Subject: [U-Boot] [PATCH v2 08/10] clk: zynq: Add optional ethernet emio clock source support X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.15 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" From: Stefan Herbrechtsmeier Add support for the optional ethernet emio clock source to the zynq clock framework driver. Signed-off-by: Stefan Herbrechtsmeier --- Changes in v2: - Return a error and print a debug message if a gem emio rx clock source is unknown - Correct the checks for valid clock objects drivers/clk/clk_zynq.c | 29 +++++++++++++++++++++++++++++ 1 file changed, 29 insertions(+) diff --git a/drivers/clk/clk_zynq.c b/drivers/clk/clk_zynq.c index a070f01..6edc4dc 100644 --- a/drivers/clk/clk_zynq.c +++ b/drivers/clk/clk_zynq.c @@ -48,6 +48,9 @@ enum zynq_clk_rclk {mio_clk, emio_clk}; struct zynq_clk_priv { ulong ps_clk_freq; +#ifndef CONFIG_SPL_BUILD + struct clk gem_emio_clk[2]; +#endif }; static void *zynq_clk_get_register(enum zynq_clk id) @@ -267,9 +270,15 @@ static ulong zynq_clk_get_peripheral_rate(struct zynq_clk_priv *priv, #ifndef CONFIG_SPL_BUILD static ulong zynq_clk_get_gem_rate(struct zynq_clk_priv *priv, enum zynq_clk id) { + struct clk *parent; + if (zynq_clk_get_gem_rclk(id) == mio_clk) return zynq_clk_get_peripheral_rate(priv, id, true); + parent = &priv->gem_emio_clk[id - gem0_clk]; + if (parent->dev) + return clk_get_rate(parent); + debug("%s: gem%d emio rx clock source unknown\n", __func__, id - gem0_clk); @@ -340,9 +349,15 @@ static ulong zynq_clk_set_peripheral_rate(struct zynq_clk_priv *priv, static ulong zynq_clk_set_gem_rate(struct zynq_clk_priv *priv, enum zynq_clk id, ulong rate) { + struct clk *parent; + if (zynq_clk_get_gem_rclk(id) == mio_clk) return zynq_clk_set_peripheral_rate(priv, id, rate, true); + parent = &priv->gem_emio_clk[id - gem0_clk]; + if (parent->dev) + return clk_set_rate(parent, rate); + debug("%s: gem%d emio rx clock source unknown\n", __func__, id - gem0_clk); @@ -436,6 +451,20 @@ static struct clk_ops zynq_clk_ops = { static int zynq_clk_probe(struct udevice *dev) { struct zynq_clk_priv *priv = dev_get_priv(dev); +#ifndef CONFIG_SPL_BUILD + unsigned int i; + char name[16]; + int ret; + + for (i = 0; i < 2; i++) { + sprintf(name, "gem%d_emio_clk", i); + ret = clk_get_by_name(dev, name, &priv->gem_emio_clk[i]); + if (ret < 0 && ret != -FDT_ERR_NOTFOUND) { + dev_err(dev, "failed to get %s clock\n", name); + return ret; + } + } +#endif priv->ps_clk_freq = fdtdec_get_uint(gd->fdt_blob, dev->of_offset, "ps-clk-frequency", 33333333UL);