From patchwork Wed Jan 4 12:27:19 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "Herbrechtsmeier Dr.-Ing. , Stefan" X-Patchwork-Id: 710968 X-Patchwork-Delegate: monstr@monstr.eu Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 3ttrgc2ngyz9t1T for ; Thu, 5 Jan 2017 00:07:08 +1100 (AEDT) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 19550B3888; Wed, 4 Jan 2017 14:06:52 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id I-sgbPoTaUYA; Wed, 4 Jan 2017 14:06:51 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 28751B388C; Wed, 4 Jan 2017 14:06:36 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 9D9AAA75FB for ; Wed, 4 Jan 2017 13:39:17 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id FFIG1fLVhw-k for ; Wed, 4 Jan 2017 13:39:17 +0100 (CET) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail2.weidmueller.de (mail2.weidmueller.de [217.244.7.241]) by theia.denx.de (Postfix) with ESMTP id 60E91A760C for ; Wed, 4 Jan 2017 13:39:17 +0100 (CET) Received: from SRVDE354.weidmueller.com (unknown [10.1.23.126]) by mail2.weidmueller.de with smtp id 5d92_06e2_13d93550_64f4_430e_8392_c3f9e6efd778; Wed, 04 Jan 2017 13:28:01 +0100 Received: from w010094-VirtualBox.weidmueller.com (10.1.94.75) by SRVDE354.weidmueller.com (10.1.23.126) with Microsoft SMTP Server id 14.3.294.0; Wed, 4 Jan 2017 13:28:00 +0100 From: To: Date: Wed, 4 Jan 2017 13:27:19 +0100 Message-ID: <1483532844-20649-4-git-send-email-stefan.herbrechtsmeier@weidmueller.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1483532844-20649-1-git-send-email-stefan.herbrechtsmeier@weidmueller.com> References: <1483532844-20649-1-git-send-email-stefan.herbrechtsmeier@weidmueller.com> MIME-Version: 1.0 X-NAIMIME-Disclaimer: 1 X-NAIMIME-Modified: 1 X-NAI-Spam-Flag: NO X-NAI-Spam-Threshold: 4 X-NAI-Spam-Score: 0 X-NAI-Spam-Version: 2.3.0.9418 : core <5909> : inlines <5617> : streams <1727610> : uri <2352343> X-Mailman-Approved-At: Wed, 04 Jan 2017 14:06:26 +0100 Cc: Stefan Herbrechtsmeier , Albert Aribaud Subject: [U-Boot] [PATCH 3/8] zynq: Add clk framework support to zynq timer X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.15 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" From: Stefan Herbrechtsmeier If available use the clock framework to calculate the clock rate of the zynq timer. Signed-off-by: Stefan Herbrechtsmeier --- arch/arm/mach-zynq/timer.c | 25 +++++++++++++++++++++++++ 1 file changed, 25 insertions(+) diff --git a/arch/arm/mach-zynq/timer.c b/arch/arm/mach-zynq/timer.c index 8ff82dc..0335cbe 100644 --- a/arch/arm/mach-zynq/timer.c +++ b/arch/arm/mach-zynq/timer.c @@ -1,4 +1,7 @@ /* + * Copyright (C) 2017 Weidmüller Interface GmbH & Co. KG + * Stefan Herbrechtsmeier + * * Copyright (C) 2012 Michal Simek * Copyright (C) 2011-2012 Xilinx, Inc. All rights reserved. * @@ -25,8 +28,10 @@ * SPDX-License-Identifier: GPL-2.0+ */ +#include #include #include +#include #include #include #include @@ -56,6 +61,26 @@ int timer_init(void) (TIMER_PRESCALE << SCUTIMER_CONTROL_PRESCALER_SHIFT) | SCUTIMER_CONTROL_ENABLE_MASK; +#if defined(CONFIG_CLK) || defined(CONFIG_SPL_CLK) + struct udevice *dev; + struct clk clk; + int ret; + + ret = uclass_get_device_by_driver(UCLASS_CLK, + DM_GET_DRIVER(zynq_clk), &dev); + if (ret) + return ret; + + clk.id = cpu_6or4x_clk; + ret = clk_request(dev, &clk); + if (ret < 0) + return ret; + + gd->cpu_clk = clk_get_rate(&clk); + + clk_free(&clk); +#endif + gd->arch.timer_rate_hz = (gd->cpu_clk / 2) / (TIMER_PRESCALE + 1); /* Load the timer counter register */