From patchwork Thu Nov 17 00:02:55 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexander Graf X-Patchwork-Id: 695926 X-Patchwork-Delegate: agraf@suse.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 3tK1Z75f8Cz9syB for ; Thu, 17 Nov 2016 11:03:59 +1100 (AEDT) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 5C238B3877; Thu, 17 Nov 2016 01:03:38 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 2b96ommAexrR; Thu, 17 Nov 2016 01:03:38 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 0F0CFB3878; Thu, 17 Nov 2016 01:03:15 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id BA209A754A for ; Thu, 17 Nov 2016 01:02:58 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id JC7aBfmgQrIW for ; Thu, 17 Nov 2016 01:02:58 +0100 (CET) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mx2.suse.de (mx2.suse.de [195.135.220.15]) by theia.denx.de (Postfix) with ESMTPS id 12DCDB3830 for ; Thu, 17 Nov 2016 01:02:53 +0100 (CET) X-Virus-Scanned: by amavisd-new at test-mx.suse.de Received: from relay1.suse.de (charybdis-ext.suse.de [195.135.220.254]) by mx2.suse.de (Postfix) with ESMTP id 5AA06AC34; Thu, 17 Nov 2016 00:02:53 +0000 (UTC) From: Alexander Graf To: u-boot@lists.denx.de Date: Thu, 17 Nov 2016 01:02:55 +0100 Message-Id: <1479340982-209521-2-git-send-email-agraf@suse.de> X-Mailer: git-send-email 1.8.5.6 In-Reply-To: <1479340982-209521-1-git-send-email-agraf@suse.de> References: <1479340982-209521-1-git-send-email-agraf@suse.de> Subject: [U-Boot] [PATCH v8 1/8] efi_loader: Disable PSCI reset for ls1043 and ls1046 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.15 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" The NXP ls1043 and ls1046 systems do not (yet) have PSCI enablement for reset. Don't enable generic PSCI reset code on them. Signed-off-by: Alexander Graf --- arch/arm/cpu/armv8/Kconfig | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/arm/cpu/armv8/Kconfig b/arch/arm/cpu/armv8/Kconfig index cd2d9bb..e935233 100644 --- a/arch/arm/cpu/armv8/Kconfig +++ b/arch/arm/cpu/armv8/Kconfig @@ -28,7 +28,8 @@ config PSCI_RESET !TARGET_LS2080A_SIMU && !TARGET_LS2080AQDS && \ !TARGET_LS2080ARDB && !TARGET_LS1012AQDS && \ !TARGET_LS1012ARDB && !TARGET_LS1012AFRDM && \ - !TARGET_LS1043ARDB && !ARCH_UNIPHIER && !ARCH_SNAPDRAGON && \ + !TARGET_LS1043ARDB && !TARGET_LS1046AQDS && \ + !TARGET_LS1046ARDB && !ARCH_UNIPHIER && !ARCH_SNAPDRAGON && \ !TARGET_S32V234EVB help Most armv8 systems have PSCI support enabled in EL3, either through