diff mbox

[U-Boot,v3,10/11] arm: dts: imx6qdl-icore-rqs: Add I2C node's

Message ID 1479316917-19454-11-git-send-email-jagan@openedev.com
State Changes Requested
Delegated to: Stefano Babic
Headers show

Commit Message

Jagan Teki Nov. 16, 2016, 5:21 p.m. UTC 
From: Jagan Teki <jagan@amarulasolutions.com>

Add I2C nodes for Engicam i.CoreM6 RQS modules.

Cc: Stefano Babic <sbabic@denx.de>
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
---
 arch/arm/dts/imx6qdl-icore-rqs.dtsi | 42 +++++++++++++++++++++++++++++++++++++
 1 file changed, 42 insertions(+)

Comments

Fabio Estevam Nov. 16, 2016, 5:26 p.m. UTC | #1 
On Wed, Nov 16, 2016 at 3:21 PM, Jagan Teki <jagan@openedev.com> wrote:

> +       pinctrl_i2c3: i2c3grp {
> +               fsl,pins = <
> +                       MX6QDL_PAD_GPIO_5__I2C3_SCL  0x4001b8b1
> +                       MX6QDL_PAD_EIM_D18__I2C3_SDA 0x4001b8b1
> +                       MX6QDL_PAD_GPIO_0__CCM_CLKO1    0x130b0

This pin does not look like I2C related.
Jagan Teki Nov. 16, 2016, 5:34 p.m. UTC | #2 
On Wed, Nov 16, 2016 at 10:56 PM, Fabio Estevam <festevam@gmail.com> wrote:
> On Wed, Nov 16, 2016 at 3:21 PM, Jagan Teki <jagan@openedev.com> wrote:
>
>> +       pinctrl_i2c3: i2c3grp {
>> +               fsl,pins = <
>> +                       MX6QDL_PAD_GPIO_5__I2C3_SCL  0x4001b8b1
>> +                       MX6QDL_PAD_EIM_D18__I2C3_SDA 0x4001b8b1
>> +                       MX6QDL_PAD_GPIO_0__CCM_CLKO1    0x130b0
>
> This pin does not look like I2C related.

OK, will fix it on next version patch.

thanks!
diff mbox

Patch

diff --git a/arch/arm/dts/imx6qdl-icore-rqs.dtsi b/arch/arm/dts/imx6qdl-icore-rqs.dtsi
index 343ab35..ebf7bd1 100644
--- a/arch/arm/dts/imx6qdl-icore-rqs.dtsi
+++ b/arch/arm/dts/imx6qdl-icore-rqs.dtsi
@@ -48,6 +48,26 @@ 
 	};
 };
 
+&i2c1 {
+	clock-frequency = <100000>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_i2c1>;
+	status = "okay";
+};
+
+&i2c2 {
+	clock-frequency = <100000>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_i2c2>;
+	status = "okay";
+};
+
+&i2c3 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_i2c3>;
+	status = "okay";
+};
+
 &uart4 {
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_uart4>;
@@ -63,6 +83,28 @@ 
 };
 
 &iomuxc {
+	pinctrl_i2c1: i2c1grp {
+		fsl,pins = <
+			MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
+			MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
+		>;
+	};
+
+	pinctrl_i2c2: i2c2grp {
+		fsl,pins = <
+			MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
+			MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
+		>;
+	};
+
+	pinctrl_i2c3: i2c3grp {
+		fsl,pins = <
+			MX6QDL_PAD_GPIO_5__I2C3_SCL  0x4001b8b1
+			MX6QDL_PAD_EIM_D18__I2C3_SDA 0x4001b8b1
+			MX6QDL_PAD_GPIO_0__CCM_CLKO1    0x130b0
+		>;
+	};
+
 	pinctrl_uart4: uart4grp {
 		fsl,pins = <
 			MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1