From patchwork Mon Sep 26 04:13:16 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Masahiro Yamada X-Patchwork-Id: 674953 X-Patchwork-Delegate: yamada.m@jp.panasonic.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 3sj9Wr5g66z9s65 for ; Mon, 26 Sep 2016 14:11:35 +1000 (AEST) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=nifty.com header.i=@nifty.com header.b=GFgoY3Pj; dkim-atps=neutral Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id A6E39A7735; Mon, 26 Sep 2016 06:11:30 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id oAM6XwI0pecz; Mon, 26 Sep 2016 06:11:30 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id CBE58A76F6; Mon, 26 Sep 2016 06:11:29 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id D93A0A76F6 for ; Mon, 26 Sep 2016 06:11:26 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id BEI61Vy3yNlV for ; Mon, 26 Sep 2016 06:11:26 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from conuserg-08.nifty.com (conuserg-08.nifty.com [210.131.2.75]) by theia.denx.de (Postfix) with ESMTPS id 2A9B3A76C0 for ; Mon, 26 Sep 2016 06:11:22 +0200 (CEST) Received: from beagle.diag.org (p14092-ipngnfx01kyoto.kyoto.ocn.ne.jp [153.142.97.92]) (authenticated) by conuserg-08.nifty.com with ESMTP id u8Q4B2IB018563; Mon, 26 Sep 2016 13:11:03 +0900 DKIM-Filter: OpenDKIM Filter v2.10.3 conuserg-08.nifty.com u8Q4B2IB018563 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nifty.com; s=dec2015msa; t=1474863063; bh=88LWGMrvcqhaDoyL1ABcnkWNEO5XPoiTKzAD1jGBjJg=; h=From:To:Cc:Subject:Date:From; b=GFgoY3Pju0kH7IsUDFzF2Spw3JixMSHTggg8Z6l9s3pfhOw00WMhfwIPQxQI7rLGZ ZCXuh7r6tkLmStJdA+SaxO0077eULBFX6mW/z2uUybJ8ETsSmpRD4qYUbVKi+0UfPT ENZZaaMOR7welTkp0thSWywKrLSQVGCwEM84Sjg73JtdMyhFQGJqrD4AxNFY70NiQo HNuxbHfOmmel6EWzydjOKHoOYsuTMzTA06pGm9sk0O5U9kqGLimbobH7ulF37/Wkpv 9oFrVdbvko1HtMFdwn4akiDorN/NWvkq5JC+myjlZg6N6pTuvLBuk4UHU3pIPOEVzG iUzkytcclIH1Q== X-Nifty-SrcIP: [153.142.97.92] From: Masahiro Yamada To: u-boot@lists.denx.de Date: Mon, 26 Sep 2016 13:13:16 +0900 Message-Id: <1474863196-19449-1-git-send-email-yamada.masahiro@socionext.com> X-Mailer: git-send-email 1.9.1 Subject: [U-Boot] [PATCH] ARM: uniphier: do not setup pins for System Bus on NAND boot mode X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.15 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" For LD11 and LD20 SoCs, the System Bus and NAND are multiplexed in the same I/O pins. When booting from a NAND device, pin-mux for the System Bus must not be set-up because they are exclusive with each other. Signed-off-by: Masahiro Yamada --- arch/arm/mach-uniphier/init/init-ld11.c | 4 +++- arch/arm/mach-uniphier/init/init-ld20.c | 4 +++- 2 files changed, 6 insertions(+), 2 deletions(-) diff --git a/arch/arm/mach-uniphier/init/init-ld11.c b/arch/arm/mach-uniphier/init/init-ld11.c index e324c94..fdb2838 100644 --- a/arch/arm/mach-uniphier/init/init-ld11.c +++ b/arch/arm/mach-uniphier/init/init-ld11.c @@ -15,7 +15,9 @@ int uniphier_ld11_init(const struct uniphier_board_data *bd) { uniphier_sbc_init_savepin(bd); uniphier_pxs2_sbc_init(bd); - uniphier_pin_init("system_bus_grp"); + /* pins for NAND and System Bus are multiplexed */ + if (spl_boot_device() != BOOT_DEVICE_NAND) + uniphier_pin_init("system_bus_grp"); support_card_reset(); diff --git a/arch/arm/mach-uniphier/init/init-ld20.c b/arch/arm/mach-uniphier/init/init-ld20.c index cb05421..37b860a 100644 --- a/arch/arm/mach-uniphier/init/init-ld20.c +++ b/arch/arm/mach-uniphier/init/init-ld20.c @@ -15,7 +15,9 @@ int uniphier_ld20_init(const struct uniphier_board_data *bd) { uniphier_sbc_init_savepin(bd); uniphier_pxs2_sbc_init(bd); - uniphier_pin_init("system_bus_grp"); + /* pins for NAND and System Bus are multiplexed */ + if (spl_boot_device() != BOOT_DEVICE_NAND) + uniphier_pin_init("system_bus_grp"); support_card_reset();