| Message ID | 1474425356-3652-1-git-send-email-clsee@altera.com |
|---|---|
| State | Changes Requested |
| Delegated to: | Marek Vasut |
| Headers | show |
On 09/21/2016 04:35 AM, Chin Liang See wrote: > Update documentation to include the Cyclone V SoC Preloader > development flow. This include the update of Preloader handoff > through qts-filter.sh script. At same time, removed the SDMMC > documentation as its using DM now. Good stuff . s/folder/directory/ , this is not windows. > Signed-off-by: Chin Liang See <clsee@altera.com> > Cc: Marek Vasut <marex@denx.de> > Cc: Dinh Nguyen <dinguyen@opensource.altera.com> > --- > doc/README.socfpga | 69 +++++++++++++++++++++++------------------------------- > 1 file changed, 29 insertions(+), 40 deletions(-) > > diff --git a/doc/README.socfpga b/doc/README.socfpga > index cfcbbfe..04c5c0e 100644 > --- a/doc/README.socfpga > +++ b/doc/README.socfpga > @@ -9,45 +9,34 @@ www.altera.com. [...] > +1. Please refer to SOCEDS documentation on generating handoff for Preloader > + Upon successful generation, there will be a folder "software/preloader" at ^^^^^^ > + the directory of your Qsys project. > + > +2. Then, you need to invoke qts-filter.sh at arch/arm/mach-socfpga folder to > + process the generated handoff files into Preloader source code. > + $ sh arch/arm/mach-socfpga/qts-filter.sh <device> <your Qsys directory> \ > + <your Qsys directory>/software/preloader> <destination of handoff files> > + > + Example: > + > + $ cd <u-boot directory> > + $ sh arch/arm/mach-socfpga/qts-filter.sh cyclone5 \ > + /hardware/cv_soc_devkit_ghrd/ \ > + /hardware/cv_soc_devkit_ghrd/software/preloader/ \ > + board/altera/cyclone5-socdk/qts/ You should be explicit that these are two separate examples , one for CV and the other one for AV . > + $ cd <u-boot directory> > + $ sh arch/arm/mach-socfpga/qts-filter.sh arria5 \ > + /hardware/av_soc_devkit_ghrd/ \ > + /hardware/av_soc_devkit_ghrd/software/preloader/ > + board/altera/arria5-socdk/qts/ > + > +3. Build the Preloader + U-Boot It's called U-Boot SPL , not preloader . > + $ export CROSS_COMPILE=arm-altera-eabi- > + $ make mrproper > + $ make socfpga_cyclone5_defconfig > + $ make It's worth mentioning the generated u-boot-with-spl.sfp and how to install it onto a card (mention partitioning layout) and into QSPI NOR (just write the binary at the beginning). Regarding QSPI NOR, it might be worth mentioning quartus_hps, see : https://rocketboards.org/foswiki/view/Documentation/GSRD131QspiProgram
On Wed, 2016-09-21 at 11:59 +0200, Marek Vasut wrote: > On 09/21/2016 04:35 AM, Chin Liang See wrote: > > Update documentation to include the Cyclone V SoC Preloader > > development flow. This include the update of Preloader handoff > > through qts-filter.sh script. At same time, removed the SDMMC > > documentation as its using DM now. > > Good stuff . s/folder/directory/ , this is not windows. haha sound like a habit using windows term :) > > > Signed-off-by: Chin Liang See <clsee@altera.com> > > Cc: Marek Vasut <marex@denx.de> > > Cc: Dinh Nguyen <dinguyen@opensource.altera.com> > > --- > > doc/README.socfpga | 69 +++++++++++++++++++++++------------------- > > ------------ > > 1 file changed, 29 insertions(+), 40 deletions(-) > > > > diff --git a/doc/README.socfpga b/doc/README.socfpga > > index cfcbbfe..04c5c0e 100644 > > --- a/doc/README.socfpga > > +++ b/doc/README.socfpga > > @@ -9,45 +9,34 @@ www.altera.com. > > [...] > > > +1. Please refer to SOCEDS documentation on generating handoff for > > Preloader > > + Upon successful generation, there will be a folder > > "software/preloader" at > ^^^^^^ > > + the directory of your Qsys project. > > + > > +2. Then, you need to invoke qts-filter.sh at arch/arm/mach-socfpga > > folder to > > + process the generated handoff files into Preloader source code. > > + $ sh arch/arm/mach-socfpga/qts-filter.sh <device> <your Qsys > > directory> \ > > + <your Qsys directory>/software/preloader> <destination of > > handoff files> > > + > > + Example: > > + > > + $ cd <u-boot directory> > > + $ sh arch/arm/mach-socfpga/qts-filter.sh cyclone5 \ > > + /hardware/cv_soc_devkit_ghrd/ \ > > + /hardware/cv_soc_devkit_ghrd/software/preloader/ \ > > + board/altera/cyclone5-socdk/qts/ > > You should be explicit that these are two separate examples , one for > CV > and the other one for AV . Sure, always to good to explain in detailed > > > + $ cd <u-boot directory> > > + $ sh arch/arm/mach-socfpga/qts-filter.sh arria5 \ > > + /hardware/av_soc_devkit_ghrd/ \ > > + /hardware/av_soc_devkit_ghrd/software/preloader/ > > + board/altera/arria5-socdk/qts/ > > + > > +3. Build the Preloader + U-Boot > > It's called U-Boot SPL , not preloader . Will fix > > > + $ export CROSS_COMPILE=arm-altera-eabi- > > + $ make mrproper > > + $ make socfpga_cyclone5_defconfig > > + $ make > > It's worth mentioning the generated u-boot-with-spl.sfp and how to > install it onto a card (mention partitioning layout) and into QSPI > NOR (just write the binary at the beginning). Regarding QSPI NOR, it > might be worth mentioning quartus_hps, see : > https://rocketboards.org/foswiki/view/Documentation/GSRD131QspiProgra > m > Sure, I will add more as I just received email to explain these steps :) Thanks Chin Liang > >
diff --git a/doc/README.socfpga b/doc/README.socfpga index cfcbbfe..04c5c0e 100644 --- a/doc/README.socfpga +++ b/doc/README.socfpga @@ -9,45 +9,34 @@ www.altera.com. -------------------------------------------- -socfpga_dw_mmc +Working with Cyclone V SoC Preloader -------------------------------------------- -Here are macro and detailed configuration required to enable DesignWare SDMMC -controller support within SOCFPGA -#define CONFIG_MMC --> To enable the SD MMC framework support - -#define CONFIG_SDMMC_BASE (SOCFPGA_SDMMC_ADDRESS) --> The base address of CSR register for DesignWare SDMMC controller - -#define CONFIG_GENERIC_MMC --> Enable the generic MMC driver - -#define CONFIG_SYS_MMC_MAX_BLK_COUNT 256 --> Using smaller max blk cnt to avoid flooding the limited stack in OCRAM - -#define CONFIG_DWMMC --> Enable the common DesignWare SDMMC controller framework - -#define CONFIG_SOCFPGA_DWMMC --> Enable the SOCFPGA specific driver for DesignWare SDMMC controller - -#define CONFIG_SOCFPGA_DWMMC_FIFO_DEPTH 1024 --> The FIFO depth for SOCFPGA DesignWare SDMMC controller - -#define CONFIG_SOCFPGA_DWMMC_DRVSEL 3 --> Phase-shifted clock of sdmmc_clk for controller to drive command and data to -the card to meet hold time requirements. SD clock is running at 50MHz and -drvsel is set to shift 135 degrees (3 * 45 degrees). With that, the hold time -is 135 / 360 * 20ns = 7.5ns. - -#define CONFIG_SOCFPGA_DWMMC_SMPSEL 0 --> Phase-shifted clock of sdmmc_clk used to sample the command and data from -the card - -#define CONFIG_SOCFPGA_DWMMC_BUS_WIDTH 4 --> Bus width of data line which either 1, 4 or 8 and based on board routing. - -#define CONFIG_SOCFPGA_DWMMC_BUS_HZ 50000000 --> The clock rate to controller. Do note the controller have a wrapper which -divide the clock from PLL by 4. +1. Please refer to SOCEDS documentation on generating handoff for Preloader + Upon successful generation, there will be a folder "software/preloader" at + the directory of your Qsys project. + +2. Then, you need to invoke qts-filter.sh at arch/arm/mach-socfpga folder to + process the generated handoff files into Preloader source code. + $ sh arch/arm/mach-socfpga/qts-filter.sh <device> <your Qsys directory> \ + <your Qsys directory>/software/preloader> <destination of handoff files> + + Example: + + $ cd <u-boot directory> + $ sh arch/arm/mach-socfpga/qts-filter.sh cyclone5 \ + /hardware/cv_soc_devkit_ghrd/ \ + /hardware/cv_soc_devkit_ghrd/software/preloader/ \ + board/altera/cyclone5-socdk/qts/ + + $ cd <u-boot directory> + $ sh arch/arm/mach-socfpga/qts-filter.sh arria5 \ + /hardware/av_soc_devkit_ghrd/ \ + /hardware/av_soc_devkit_ghrd/software/preloader/ + board/altera/arria5-socdk/qts/ + +3. Build the Preloader + U-Boot + $ export CROSS_COMPILE=arm-altera-eabi- + $ make mrproper + $ make socfpga_cyclone5_defconfig + $ make
Update documentation to include the Cyclone V SoC Preloader development flow. This include the update of Preloader handoff through qts-filter.sh script. At same time, removed the SDMMC documentation as its using DM now. Signed-off-by: Chin Liang See <clsee@altera.com> Cc: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> --- doc/README.socfpga | 69 +++++++++++++++++++++++------------------------------- 1 file changed, 29 insertions(+), 40 deletions(-)