From patchwork Mon Sep 19 03:55:41 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peng Fan X-Patchwork-Id: 671547 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 3scsWc56KBz9s5w for ; Mon, 19 Sep 2016 13:56:28 +1000 (AEST) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b=tvhTt7O3; dkim-atps=neutral Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id AB457A758E; Mon, 19 Sep 2016 05:56:25 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id cOTIRMaXl0Vs; Mon, 19 Sep 2016 05:56:25 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 6BF8A4BDBD; Mon, 19 Sep 2016 05:56:23 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 85C914BA16 for ; Mon, 19 Sep 2016 05:56:17 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id HI9LJfX36FyL for ; Mon, 19 Sep 2016 05:56:17 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail-pa0-f66.google.com (mail-pa0-f66.google.com [209.85.220.66]) by theia.denx.de (Postfix) with ESMTPS id 0BD684B9F9 for ; Mon, 19 Sep 2016 05:56:13 +0200 (CEST) Received: by mail-pa0-f66.google.com with SMTP id oz2so6316040pac.0 for ; Sun, 18 Sep 2016 20:56:13 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=EajxsCIXv8zkALTuUbqH/kjgNnOYjchxUZqkV4Pr8iQ=; b=tvhTt7O3dyBw1gS5MBDr2rA5OojZ2peOtxg2ndAl9uMfVXG9aF0gjBnEO8UUappCkO clgQivJZeZYQ49e+eQzoqgTN1nLoZ/tYVX6jp3nPZE6+zIDzegE8I9BHCT5/unyMVYpM lgEoxuy5smlv6DLB2chXO14edlPVrKKU0IYmoBslFXVUFrrSEyTsxYJ9s+viSAeob1pD xknwqD408zR24MS7KmSgxtBT7EAxGU/gVfBowOq2lskU/LPoDYykTgCeSFdSH+H1tHq9 hE+yDBVj6MDuQeWBSUFA/Xiv7q3+OF11lpnYff2CKSEd46GhAjFq3aKklznxa5rAW1Jf Fu3Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=EajxsCIXv8zkALTuUbqH/kjgNnOYjchxUZqkV4Pr8iQ=; b=FL28R157G8s2qj6sA7QBFQgwbfgtf/6gVWYZCcnzH7zuIs73ZH8kmogCAx2YtwzSlC Uni66FLWFw2jVYIr5dDgiMlo4zQoj2D1Cc9P+a+Z5qdXZd1V5+3u6YtGb6NZyJ2qTBYb 4V4V+Ud3X3HgbXvNfx4sZiHENpvsIY5wYxKGcbt+CGVtJ0ib1Hf2z5RuiknkSL6P1ayZ IkTuCDCA/HjkxBm6pKsX7xE58B6ZPesAkMCmfhd9/YSkV0cz1OT8DOMK6jHV06NLu6q/ 2It3jaMT9D5SXBao+NB9ctaj1tyI65lrbDSUqSoOR81TNi2Ht/02yc5UFNOFzvRSyx84 pR5w== X-Gm-Message-State: AE9vXwMzScdZ8bOob+UsNqjBUcqVWJT1rTU4182WL9CqiKag71pOc0VFHVPTYcJvCEw8vQ== X-Received: by 10.66.249.103 with SMTP id yt7mr15470178pac.46.1474257372332; Sun, 18 Sep 2016 20:56:12 -0700 (PDT) Received: from linux-7smt.suse (gate-zmy3.freescale.com. [192.88.167.1]) by smtp.gmail.com with ESMTPSA id y2sm27103195pan.31.2016.09.18.20.56.09 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Sun, 18 Sep 2016 20:56:11 -0700 (PDT) From: van.freenix@gmail.com X-Google-Original-From: peng.fan@nxp.com To: sbabic@denx.de Date: Mon, 19 Sep 2016 11:55:41 +0800 Message-Id: <1474257344-12962-2-git-send-email-peng.fan@nxp.com> X-Mailer: git-send-email 2.6.2 In-Reply-To: <1474257344-12962-1-git-send-email-peng.fan@nxp.com> References: <1474257344-12962-1-git-send-email-peng.fan@nxp.com> Cc: u-boot@lists.denx.de, Utkarsh Gupta Subject: [U-Boot] [PATCH 2/5] imx: mx6: Add plugin support X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.15 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" From: Peng Fan Add mx6_plugin.S which calls boot rom setup function, generate the second ivt, and jump back to boot rom. Signed-off-by: Peng Fan Signed-off-by: Ye Li Signed-off-by: Utkarsh Gupta --- arch/arm/include/asm/arch-mx6/mx6_plugin.S | 159 +++++++++++++++++++++++++++++ 1 file changed, 159 insertions(+) create mode 100644 arch/arm/include/asm/arch-mx6/mx6_plugin.S diff --git a/arch/arm/include/asm/arch-mx6/mx6_plugin.S b/arch/arm/include/asm/arch-mx6/mx6_plugin.S new file mode 100644 index 0000000..b7d1b20 --- /dev/null +++ b/arch/arm/include/asm/arch-mx6/mx6_plugin.S @@ -0,0 +1,159 @@ +/* + * Copyright (C) 2016 Freescale Semiconductor, Inc. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include + +#ifdef CONFIG_ROM_UNIFIED_SECTIONS +#define ROM_API_TABLE_BASE_ADDR_LEGACY 0x180 +#define ROM_VERSION_OFFSET 0x80 +#else +#define ROM_API_TABLE_BASE_ADDR_LEGACY 0xC0 +#define ROM_VERSION_OFFSET 0x48 +#endif +#define ROM_API_TABLE_BASE_ADDR_MX6DQ_TO15 0xC4 +#define ROM_API_TABLE_BASE_ADDR_MX6DL_TO12 0xC4 +#define ROM_API_HWCNFG_SETUP_OFFSET 0x08 +#define ROM_VERSION_TO10 0x10 +#define ROM_VERSION_TO12 0x12 +#define ROM_VERSION_TO15 0x15 + +plugin_start: + + push {r0-r4, lr} + + imx6_ddr_setting + imx6_clock_gating + imx6_qos_setting + +/* + * The following is to fill in those arguments for this ROM function + * pu_irom_hwcnfg_setup(void **start, size_t *bytes, const void *boot_data) + * This function is used to copy data from the storage media into DDR. + * start - Initial (possibly partial) image load address on entry. + * Final image load address on exit. + * bytes - Initial (possibly partial) image size on entry. + * Final image size on exit. + * boot_data - Initial @ref ivt Boot Data load address. + */ + adr r0, boot_data2 + adr r1, image_len2 + adr r2, boot_data2 + +#ifdef CONFIG_NOR_BOOT +#ifdef CONFIG_MX6SX + ldr r3, =ROM_VERSION_OFFSET + ldr r4, [r3] + cmp r4, #ROM_VERSION_TO10 + bgt before_calling_rom___pu_irom_hwcnfg_setup + ldr r3, =0x00900b00 + ldr r4, =0x50000000 + str r4, [r3, #0x5c] +#else + ldr r3, =0x00900800 + ldr r4, =0x08000000 + str r4, [r3, #0xc0] +#endif +#endif + +/* + * check the _pu_irom_api_table for the address + */ +before_calling_rom___pu_irom_hwcnfg_setup: + ldr r3, =ROM_VERSION_OFFSET + ldr r4, [r3] +#if defined(CONFIG_MX6SOLO) || defined(CONFIG_MX6DL) + ldr r3, =ROM_VERSION_TO12 + cmp r4, r3 + ldrge r3, =ROM_API_TABLE_BASE_ADDR_MX6DL_TO12 + ldrlt r3, =ROM_API_TABLE_BASE_ADDR_LEGACY +#elif defined(CONFIG_MX6Q) + ldr r3, =ROM_VERSION_TO15 + cmp r4, r3 + ldrge r3, =ROM_API_TABLE_BASE_ADDR_MX6DQ_TO15 + ldrlt r3, =ROM_API_TABLE_BASE_ADDR_LEGACY +#else + ldr r3, =ROM_API_TABLE_BASE_ADDR_LEGACY +#endif + ldr r4, [r3, #ROM_API_HWCNFG_SETUP_OFFSET] + blx r4 +after_calling_rom___pu_irom_hwcnfg_setup: + +/* + * ROM_API_HWCNFG_SETUP function enables MMU & Caches. + * Thus disable MMU & Caches. + */ + + mrc p15, 0, r0, c1, c0, 0 /* read CP15 register 1 into r0*/ + ands r0, r0, #0x1 /* check if MMU is enabled */ + beq mmu_disable_notreq /* exit if MMU is already disabled */ + + /* Disable caches, MMU */ + mrc p15, 0, r0, c1, c0, 0 /* read CP15 register 1 into r0 */ + bic r0, r0, #(1 << 2) /* disable D Cache */ + bic r0, r0, #0x1 /* clear bit 0 ; MMU off */ + + bic r0, r0, #(0x1 << 11) /* disable Z, branch prediction */ + bic r0, r0, #(0x1 << 1) /* disable A, Strict alignment */ + /* check enabled. */ + mcr p15, 0, r0, c1, c0, 0 /* write CP15 register 1 */ + mov r0, r0 + mov r0, r0 + mov r0, r0 + mov r0, r0 + +mmu_disable_notreq: + NOP + +/* To return to ROM from plugin, we need to fill in these argument. + * Here is what need to do: + * Need to construct the paramters for this function before return to ROM: + * plugin_download(void **start, size_t *bytes, UINT32 *ivt_offset) + */ + pop {r0-r4, lr} + push {r5} + ldr r5, boot_data2 + str r5, [r0] + ldr r5, image_len2 + str r5, [r1] + ldr r5, second_ivt_offset + str r5, [r2] + mov r0, #1 + pop {r5} + + /* return back to ROM code */ + bx lr + +/* make the following data right in the end of the output*/ +.ltorg + +#if (defined(CONFIG_NOR_BOOT) || defined(CONFIG_QSPI_BOOT)) +#define FLASH_OFFSET 0x1000 +#else +#define FLASH_OFFSET 0x400 +#endif + +/* + * second_ivt_offset is the offset from the "second_ivt_header" to + * "image_copy_start", which involves FLASH_OFFSET, plus the first + * ivt_header, the plugin code size itself recorded by "ivt2_header" + */ + +second_ivt_offset: .long (ivt2_header + 0x2C + FLASH_OFFSET) + +/* + * The following is the second IVT header plus the second boot data + */ +ivt2_header: .long 0x0 +app2_code_jump_v: .long 0x0 +reserv3: .long 0x0 +dcd2_ptr: .long 0x0 +boot_data2_ptr: .long 0x0 +self_ptr2: .long 0x0 +app_code_csf2: .long 0x0 +reserv4: .long 0x0 +boot_data2: .long 0x0 +image_len2: .long 0x0 +plugin2: .long 0x0