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[192.88.167.1]) by smtp.gmail.com with ESMTPSA id y128sm10546295pfb.13.2016.05.18.02.11.01 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 18 May 2016 02:11:08 -0700 (PDT) From: macro.wave.z@gmail.com X-Google-Original-From: hongbo.zhang@nxp.com To: u-boot@lists.denx.de, albert.u.boot@aribaud.net, marc.zyngier@arm.com, jan.kiszka@siemens.com, trini@konsulko.com, wens@csie.org, frank.li@freescale.com, peng.fan@freescale.com Date: Wed, 18 May 2016 17:10:24 +0800 Message-Id: <1463562634-16723-2-git-send-email-hongbo.zhang@nxp.com> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1463562634-16723-1-git-send-email-hongbo.zhang@nxp.com> References: <1463562634-16723-1-git-send-email-hongbo.zhang@nxp.com> Cc: lorenzo.pieralisi@arm.com, chenhui.zhao@nxp.com, jason.jin@nxp.com, Wang Dongsheng , alison.wang@nxp.com, sudeep.holla@arm.com, oss@buserror.net, dongsheng.wang@nufront.com, twarren@nvidia.com, ijc@hellion.org.uk Subject: [U-Boot] [PATCH v3 01/11] ARM: PSCI: change PSCI function IDs base and offsets X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.15 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" From: Wang Dongsheng According to PSCI specification v1.0, the PSCI functions should start from 0x84000000 for SMC32, this patch changes this base value as well as other function offset values. Signed-off-by: Wang Dongsheng Signed-off-by: Hongbo Zhang Reviewed-by: Andre Przywara --- arch/arm/include/asm/psci.h | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/arch/arm/include/asm/psci.h b/arch/arm/include/asm/psci.h index 128a606..a4a19e3 100644 --- a/arch/arm/include/asm/psci.h +++ b/arch/arm/include/asm/psci.h @@ -19,13 +19,13 @@ #define __ARM_PSCI_H__ /* PSCI interface */ -#define ARM_PSCI_FN_BASE 0x95c1ba5e +#define ARM_PSCI_FN_BASE 0x84000000 #define ARM_PSCI_FN(n) (ARM_PSCI_FN_BASE + (n)) -#define ARM_PSCI_FN_CPU_SUSPEND ARM_PSCI_FN(0) -#define ARM_PSCI_FN_CPU_OFF ARM_PSCI_FN(1) -#define ARM_PSCI_FN_CPU_ON ARM_PSCI_FN(2) -#define ARM_PSCI_FN_MIGRATE ARM_PSCI_FN(3) +#define ARM_PSCI_FN_CPU_SUSPEND ARM_PSCI_FN(1) +#define ARM_PSCI_FN_CPU_OFF ARM_PSCI_FN(2) +#define ARM_PSCI_FN_CPU_ON ARM_PSCI_FN(3) +#define ARM_PSCI_FN_MIGRATE ARM_PSCI_FN(5) #define ARM_PSCI_RET_SUCCESS 0 #define ARM_PSCI_RET_NI (-1)