From patchwork Mon May 16 12:51:24 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Masahiro Yamada X-Patchwork-Id: 622570 X-Patchwork-Delegate: yamada.m@jp.panasonic.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 3r7gP11xCJz9t7N for ; Mon, 16 May 2016 22:53:09 +1000 (AEST) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=nifty.com header.i=@nifty.com header.b=snZ3FmTW; dkim-atps=neutral Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 6C2C3A77A5; Mon, 16 May 2016 14:52:15 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id E8JTZkzxSYUf; Mon, 16 May 2016 14:52:15 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 9C7D6A777C; Mon, 16 May 2016 14:51:49 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 13130A776C for ; Mon, 16 May 2016 14:51:35 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id BhoQTBroQUH3 for ; Mon, 16 May 2016 14:51:35 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from conuserg-12.nifty.com (conuserg-12.nifty.com [210.131.2.79]) by theia.denx.de (Postfix) with ESMTPS id 28E87A7734 for ; Mon, 16 May 2016 14:51:18 +0200 (CEST) Received: from beagle.diag.org (p14092-ipngnfx01kyoto.kyoto.ocn.ne.jp [153.142.97.92]) (authenticated) by conuserg-12.nifty.com with ESMTP id u4GCoiAw001768; Mon, 16 May 2016 21:51:00 +0900 DKIM-Filter: OpenDKIM Filter v2.10.3 conuserg-12.nifty.com u4GCoiAw001768 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nifty.com; s=dec2015msa; t=1463403060; bh=pc5ixflmr4gfrpMBifzH/o4mqIVxQJzB6Hhv8gIiivg=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=snZ3FmTWsdjNKqgoVmtLoD1cxXXLH57RvYKyQInrTLC37MSw94MCR7PXzGh4h7JWU V95gWwZHiKUg5RInP8iMR2AkunPsNU4m06KgARvw6h3RaWrM5U03Sxf5tpiSsDye6w R3Id6k2XR4+P/IFtsW84GcSEmBTVUCKJ2kfZ0voSvP/gQoS4Nf/QbFjkhEwobv+R4m tC2FroKnNB47nzfOdviwe4PfXPVMpDRXoF/gLpyBpl7PykVEFEm80Tj1vpMNZ7o3Ob JUuV/3woURW4v+EaZWAHKHJflVXITcUyNuD3h7t/STL8s7D1m3hC77T00i1owvAass 88xi80J5QNPzA== X-Nifty-SrcIP: [153.142.97.92] From: Masahiro Yamada To: u-boot@lists.denx.de Date: Mon, 16 May 2016 21:51:24 +0900 Message-Id: <1463403086-25362-12-git-send-email-yamada.masahiro@socionext.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1463403086-25362-1-git-send-email-yamada.masahiro@socionext.com> References: <1463403086-25362-1-git-send-email-yamada.masahiro@socionext.com> Cc: Marek Vasut Subject: [U-Boot] [PATCH v2 11/13] ARM: uniphier: adjust ifdefs for new UniPhier DWC3 CONFIG X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.15 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Now USB 3.0 feature is enabled/disabled by CONFIG_USB_DWC3_UNIPHIER. Signed-off-by: Masahiro Yamada --- Changes in v2: None arch/arm/mach-uniphier/clk/clk-pro4.c | 6 +++--- arch/arm/mach-uniphier/clk/clk-pro5.c | 6 +++--- arch/arm/mach-uniphier/clk/clk-pxs2.c | 6 +++--- 3 files changed, 9 insertions(+), 9 deletions(-) diff --git a/arch/arm/mach-uniphier/clk/clk-pro4.c b/arch/arm/mach-uniphier/clk/clk-pro4.c index 8746d7d..6a01543 100644 --- a/arch/arm/mach-uniphier/clk/clk-pro4.c +++ b/arch/arm/mach-uniphier/clk/clk-pro4.c @@ -15,7 +15,7 @@ void uniphier_pro4_clk_init(void) /* deassert reset */ tmp = readl(SC_RSTCTRL); -#ifdef CONFIG_USB_XHCI_UNIPHIER +#ifdef CONFIG_USB_DWC3_UNIPHIER tmp |= SC_RSTCTRL_NRST_USB3B0 | SC_RSTCTRL_NRST_USB3C0 | SC_RSTCTRL_NRST_GIO; #endif @@ -31,7 +31,7 @@ void uniphier_pro4_clk_init(void) writel(tmp, SC_RSTCTRL); readl(SC_RSTCTRL); /* dummy read */ -#ifdef CONFIG_USB_XHCI_UNIPHIER +#ifdef CONFIG_USB_DWC3_UNIPHIER tmp = readl(SC_RSTCTRL2); tmp |= SC_RSTCTRL2_NRST_USB3B1 | SC_RSTCTRL2_NRST_USB3C1; writel(tmp, SC_RSTCTRL2); @@ -40,7 +40,7 @@ void uniphier_pro4_clk_init(void) /* provide clocks */ tmp = readl(SC_CLKCTRL); -#ifdef CONFIG_USB_XHCI_UNIPHIER +#ifdef CONFIG_USB_DWC3_UNIPHIER tmp |= SC_CLKCTRL_CEN_USB31 | SC_CLKCTRL_CEN_USB30 | SC_CLKCTRL_CEN_GIO; #endif diff --git a/arch/arm/mach-uniphier/clk/clk-pro5.c b/arch/arm/mach-uniphier/clk/clk-pro5.c index 823bb06..dd86cad 100644 --- a/arch/arm/mach-uniphier/clk/clk-pro5.c +++ b/arch/arm/mach-uniphier/clk/clk-pro5.c @@ -15,7 +15,7 @@ void uniphier_pro5_clk_init(void) /* deassert reset */ tmp = readl(SC_RSTCTRL); -#ifdef CONFIG_USB_XHCI_UNIPHIER +#ifdef CONFIG_USB_DWC3_UNIPHIER tmp |= SC_RSTCTRL_NRST_USB3B0 | SC_RSTCTRL_NRST_GIO; #endif #ifdef CONFIG_NAND_DENALI @@ -24,7 +24,7 @@ void uniphier_pro5_clk_init(void) writel(tmp, SC_RSTCTRL); readl(SC_RSTCTRL); /* dummy read */ -#ifdef CONFIG_USB_XHCI_UNIPHIER +#ifdef CONFIG_USB_DWC3_UNIPHIER tmp = readl(SC_RSTCTRL2); tmp |= SC_RSTCTRL2_NRST_USB3B1; writel(tmp, SC_RSTCTRL2); @@ -33,7 +33,7 @@ void uniphier_pro5_clk_init(void) /* provide clocks */ tmp = readl(SC_CLKCTRL); -#ifdef CONFIG_USB_XHCI_UNIPHIER +#ifdef CONFIG_USB_DWC3_UNIPHIER tmp |= SC_CLKCTRL_CEN_USB31 | SC_CLKCTRL_CEN_USB30 | SC_CLKCTRL_CEN_GIO; #endif diff --git a/arch/arm/mach-uniphier/clk/clk-pxs2.c b/arch/arm/mach-uniphier/clk/clk-pxs2.c index 76bf856..3b50a20 100644 --- a/arch/arm/mach-uniphier/clk/clk-pxs2.c +++ b/arch/arm/mach-uniphier/clk/clk-pxs2.c @@ -15,7 +15,7 @@ void uniphier_pxs2_clk_init(void) /* deassert reset */ tmp = readl(SC_RSTCTRL); -#ifdef CONFIG_USB_XHCI_UNIPHIER +#ifdef CONFIG_USB_DWC3_UNIPHIER tmp |= SC_RSTCTRL_NRST_USB3B0 | SC_RSTCTRL_NRST_GIO; #endif #ifdef CONFIG_UNIPHIER_ETH @@ -27,7 +27,7 @@ void uniphier_pxs2_clk_init(void) writel(tmp, SC_RSTCTRL); readl(SC_RSTCTRL); /* dummy read */ -#ifdef CONFIG_USB_XHCI_UNIPHIER +#ifdef CONFIG_USB_DWC3_UNIPHIER tmp = readl(SC_RSTCTRL2); tmp |= SC_RSTCTRL2_NRST_USB3B1; writel(tmp, SC_RSTCTRL2); @@ -36,7 +36,7 @@ void uniphier_pxs2_clk_init(void) /* provide clocks */ tmp = readl(SC_CLKCTRL); -#ifdef CONFIG_USB_XHCI_UNIPHIER +#ifdef CONFIG_USB_DWC3_UNIPHIER tmp |= SC_CLKCTRL_CEN_USB31 | SC_CLKCTRL_CEN_USB30 | SC_CLKCTRL_CEN_GIO; #endif