From patchwork Wed Apr 20 16:14:01 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Griffin X-Patchwork-Id: 612928 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 3qr74B4Mc9z9sBf for ; Thu, 21 Apr 2016 15:44:42 +1000 (AEST) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.b=Kg/aWlEG; dkim-atps=neutral Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 94DF5A778E; Thu, 21 Apr 2016 07:41:35 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id m1zhiMaY7glD; Thu, 21 Apr 2016 07:41:35 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id E0D51A7790; Thu, 21 Apr 2016 07:40:56 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 88C12A756F for ; Wed, 20 Apr 2016 18:14:38 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 2tVekWiNtl7R for ; Wed, 20 Apr 2016 18:14:37 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail-wm0-f52.google.com (mail-wm0-f52.google.com [74.125.82.52]) by theia.denx.de (Postfix) with ESMTPS id 3C2CEA7658 for ; Wed, 20 Apr 2016 18:14:18 +0200 (CEST) Received: by mail-wm0-f52.google.com with SMTP id v188so210243256wme.1 for ; Wed, 20 Apr 2016 09:14:18 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=XgMCwiPjPlkjsxfZoOFFT7c4FigWqTHrcdf/VjPC+7Y=; b=Kg/aWlEGymtkkPFFEt14hWslzv6RDNCWqUAZLqvYOHhiKwugaztokEcfWDgrDCWQMI bwFJsbomxbtV3R1zKxUFnsk03pMpAjksYu1/6Fg9og3+UiQOAu7jHXqgN+VwxZ7iA8kg F96UnvrcKhjBow5XaSrFUvHkgLfFyMns5sYAw= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=XgMCwiPjPlkjsxfZoOFFT7c4FigWqTHrcdf/VjPC+7Y=; b=Qp/RmFVLK9VPwvFrTjn/AJySdQNzhwHKaq6sa0NwsO4qRxFlUJaeULqeaJp1po16V1 Wxm77iN0XHkWTL8x9lxC26ARk/btBA9FVwjgO6gDG14k1BpQ7OhGYFLSXArE3BKnnHQH +2ELrp03ZdpCX/NRoPC9kInieW5IRSd9hEXF70pJWpRTb0fc5XC8Z+UytDtV3VWmfs07 ms/AzBGscTODVspfJ8bM1R0z8UsFNs/aHAs6z/pt5hlEIIKhxAdWZDFQ79oiiqULDD6u J+Lexa912bc1uWgIAdkwXZOdmPSa62+VeKY7FKq2QN1+wvnBImy4qqTmczEMvLySrsiI 6+YQ== X-Gm-Message-State: AOPr4FWSWaxS6LCWPMLh2aO54bJjKXzMuE8513jm8bDaRlD1L/+qbtHtXEbWeUQHxQ9f6hqR X-Received: by 10.28.92.69 with SMTP id q66mr10762456wmb.102.1461168857496; Wed, 20 Apr 2016 09:14:17 -0700 (PDT) Received: from localhost.localdomain (cpc84787-aztw28-2-0-cust15.18-1.cable.virginm.net. [82.37.140.16]) by smtp.gmail.com with ESMTPSA id da5sm6353845wjb.25.2016.04.20.09.14.15 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 20 Apr 2016 09:14:16 -0700 (PDT) From: Peter Griffin To: u-boot@lists.denx.de, albert.u.boot@aribaud.net, sjg@chromium.org, agraf@suse.de, trini@konsulko.com, liming.wang@canonical.com Date: Wed, 20 Apr 2016 17:14:01 +0100 Message-Id: <1461168843-15610-6-git-send-email-peter.griffin@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1461168843-15610-1-git-send-email-peter.griffin@linaro.org> References: <1461168843-15610-1-git-send-email-peter.griffin@linaro.org> Subject: [U-Boot] [PATCH 5/7] ARM: hisilicon: hikey: dts: Add pl011 additional clock binding. X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.15 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" This is a binding which only exists in U-Boot, but is required to get working serial in U-Boot. Signed-off-by: Peter Griffin Reviewed-by: Tom Rini --- arch/arm/dts/hi6220.dtsi | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm/dts/hi6220.dtsi b/arch/arm/dts/hi6220.dtsi index ad1f1eb..a610ccb 100644 --- a/arch/arm/dts/hi6220.dtsi +++ b/arch/arm/dts/hi6220.dtsi @@ -166,6 +166,7 @@ compatible = "arm,pl011", "arm,primecell"; reg = <0x0 0xf8015000 0x0 0x1000>; interrupts = ; + clock = <19200000>; clocks = <&ao_ctrl HI6220_UART0_PCLK>, <&ao_ctrl HI6220_UART0_PCLK>; clock-names = "uartclk", "apb_pclk"; @@ -175,6 +176,7 @@ compatible = "arm,pl011", "arm,primecell"; reg = <0x0 0xf7111000 0x0 0x1000>; interrupts = ; + clock = <19200000>; clocks = <&sys_ctrl HI6220_UART1_PCLK>, <&sys_ctrl HI6220_UART1_PCLK>; clock-names = "uartclk", "apb_pclk"; @@ -185,6 +187,7 @@ compatible = "arm,pl011", "arm,primecell"; reg = <0x0 0xf7112000 0x0 0x1000>; interrupts = ; + clock = <19200000>; clocks = <&sys_ctrl HI6220_UART2_PCLK>, <&sys_ctrl HI6220_UART2_PCLK>; clock-names = "uartclk", "apb_pclk"; @@ -195,6 +198,7 @@ compatible = "arm,pl011", "arm,primecell"; reg = <0x0 0xf7113000 0x0 0x1000>; interrupts = ; + clock = <19200000>; clocks = <&sys_ctrl HI6220_UART3_PCLK>, <&sys_ctrl HI6220_UART3_PCLK>; clock-names = "uartclk", "apb_pclk"; @@ -204,6 +208,7 @@ compatible = "arm,pl011", "arm,primecell"; reg = <0x0 0xf7114000 0x0 0x1000>; interrupts = ; + clock = <19200000>; clocks = <&sys_ctrl HI6220_UART4_PCLK>, <&sys_ctrl HI6220_UART4_PCLK>; clock-names = "uartclk", "apb_pclk";