From patchwork Wed Feb 10 19:08:03 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jagan Teki X-Patchwork-Id: 581558 X-Patchwork-Delegate: jagannadh.teki@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id CF2CE140325 for ; Thu, 11 Feb 2016 06:12:06 +1100 (AEDT) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 6C29AA74D5; Wed, 10 Feb 2016 20:11:17 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id eaxbo3I_ZRJw; Wed, 10 Feb 2016 20:11:17 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 51607A75A7; Wed, 10 Feb 2016 20:11:06 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 382FEA7541 for ; Wed, 10 Feb 2016 20:10:59 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id GmuQi6I4kjrz for ; Wed, 10 Feb 2016 20:10:59 +0100 (CET) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail-pf0-f195.google.com (mail-pf0-f195.google.com [209.85.192.195]) by theia.denx.de (Postfix) with ESMTPS id 3F58EA7549 for ; Wed, 10 Feb 2016 20:10:44 +0100 (CET) Received: by mail-pf0-f195.google.com with SMTP id w128so796622pfb.2 for ; Wed, 10 Feb 2016 11:10:44 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=nT5H98ObQ2EDh4r6wx9KlzSPgigL3NRdYpb3mhBCzhc=; b=lmrTnU49iD16sFn7uNEy9eTk62+AvI66NAirkwTEsH2QksDIglYCNQ6qKOZCt+Zntu Ud+9NcUfV3ap50WNd/ahoR/yuObzPYdcjWjcaMD1IZ2IZC4HeA/SfTk1H96PfpjP4OhP 2HsgiiR1w+qPtgK6WWxjiW1y+dLU6qD6ijPeGmEfs4Z7TCnyySdpIurUE1BLe9XsjmM2 Ht/PD60InM46JzZbCucTv30TyBOpuUhAvAZ/orVic/Y0dlUAYszdTgyFWX7FDocNB3gU /lArGjpQpg/c/wMUtyWnBXcealNm+2+omhu/0KwDW52h2wkc5LpeDPcB5ADWf24Vjpll O9gQ== X-Gm-Message-State: AG10YOTRWYgII5iepkQpCfG+R9NV0zJ7Iji3Qx7o3SOkF/nrHuQkFyVO7tgEJWg8J1ewQQ== X-Received: by 10.98.7.219 with SMTP id 88mr60899954pfh.49.1455131443664; Wed, 10 Feb 2016 11:10:43 -0800 (PST) Received: from localhost.localdomain ([123.236.183.254]) by smtp.gmail.com with ESMTPSA id n78sm6915903pfb.53.2016.02.10.11.10.39 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 10 Feb 2016 11:10:42 -0800 (PST) From: Jagan Teki To: u-boot@lists.denx.de Date: Thu, 11 Feb 2016 00:38:03 +0530 Message-Id: <1455131307-25406-9-git-send-email-jteki@openedev.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1455131307-25406-1-git-send-email-jteki@openedev.com> References: <1455131307-25406-1-git-send-email-jteki@openedev.com> Cc: Tom Rini , Michal Simek , Siva Durga Prasad Paladugu , Jagan Teki Subject: [U-Boot] [PATCH v5 08/32] mtd: spi-nor: Add spi_nor support in m25p80 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.15 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" m25p80 is flash interface for spi-nor core and drivers/spi so add spi_nor{} functionalities like - allocate spi_nor{} - basic initilization - install hooks - call to spi-nor core, using spi_nor_scan - register with mtd core Cc: Simon Glass Cc: Bin Meng Cc: Mugunthan V N Cc: Michal Simek Cc: Siva Durga Prasad Paladugu Signed-off-by: Jagan Teki --- drivers/mtd/spi-nor/m25p80.c | 236 +++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 236 insertions(+) diff --git a/drivers/mtd/spi-nor/m25p80.c b/drivers/mtd/spi-nor/m25p80.c index 833a9c3..57e54d0 100644 --- a/drivers/mtd/spi-nor/m25p80.c +++ b/drivers/mtd/spi-nor/m25p80.c @@ -10,14 +10,249 @@ #include #include #include + +#include + #include +#include + +struct m25p { + struct spi_slave *spi; + struct spi_nor spi_nor; +}; + +static int spi_read_then_write(struct spi_slave *spi, const u8 *cmd, + size_t cmd_len, const u8 *data_out, + u8 *data_in, size_t data_len) +{ + unsigned long flags = SPI_XFER_BEGIN; + int ret; + + if (data_len == 0) + flags |= SPI_XFER_END; + + ret = spi_xfer(spi, cmd_len * 8, cmd, NULL, flags); + if (ret) { + debug("SF: Failed to send command (%zu bytes): %d\n", + cmd_len, ret); + } else if (data_len != 0) { + ret = spi_xfer(spi, data_len * 8, data_out, data_in, + SPI_XFER_END); + if (ret) + debug("SF: Failed to transfer %zu bytes of data: %d\n", + data_len, ret); + } + + return ret; +} + +static int m25p80_read_reg(struct spi_nor *nor, u8 cmd, u8 *val, int len) +{ + struct m25p *flash = nor->priv; + struct spi_slave *spi = flash->spi; + int ret; + + ret = spi_claim_bus(spi); + if (ret < 0) { + debug("m25p80: unable to claim SPI bus\n"); + return ret; + } + + if (nor->flags & SNOR_F_U_PAGE) + spi->flags |= SPI_XFER_U_PAGE; + + ret = spi_read_then_write(spi, &cmd, 1, NULL, val, len); + if (ret < 0) { + debug("m25p80: error %d reading register %x\n", ret, cmd); + return ret; + } + + spi_release_bus(spi); + + return ret; +} + +static int m25p80_write_reg(struct spi_nor *nor, u8 cmd, u8 *buf, int len) +{ + struct m25p *flash = nor->priv; + struct spi_slave *spi = flash->spi; + int ret; + + ret = spi_claim_bus(spi); + if (ret < 0) { + debug("m25p80: unable to claim SPI bus\n"); + return ret; + } + + if (nor->flags & SNOR_F_U_PAGE) + spi->flags |= SPI_XFER_U_PAGE; + + ret = spi_read_then_write(spi, &cmd, 1, buf, NULL, len); + if (ret < 0) { + debug("m25p80: error %d writing register %x\n", ret, cmd); + return ret; + } + + spi_release_bus(spi); + + return ret; +} + +void __weak flash_copy_mmap(void *data, void *offset, size_t len) +{ + memcpy(data, offset, len); +} + +static int m25p80_read_mmap(struct spi_nor *nor, void *data, + void *offset, size_t len) +{ + struct m25p *flash = nor->priv; + struct spi_slave *spi = flash->spi; + int ret; + + ret = spi_claim_bus(spi); + if (ret) { + debug("m25p80: unable to claim SPI bus\n"); + return ret; + } + + spi_xfer(spi, 0, NULL, NULL, SPI_XFER_MMAP); + flash_copy_mmap(data, offset, len); + spi_xfer(spi, 0, NULL, NULL, SPI_XFER_MMAP_END); + + spi_release_bus(spi); + + return ret; +} + +static int m25p80_read(struct spi_nor *nor, const u8 *cmd, size_t cmd_len, + void *data, size_t data_len) +{ + struct m25p *flash = nor->priv; + struct spi_slave *spi = flash->spi; + int ret; + + ret = spi_claim_bus(spi); + if (ret < 0) { + debug("m25p80: unable to claim SPI bus\n"); + return ret; + } + + if (nor->flags & SNOR_F_U_PAGE) + spi->flags |= SPI_XFER_U_PAGE; + + ret = spi_read_then_write(spi, cmd, cmd_len, NULL, data, data_len); + if (ret < 0) { + debug("m25p80: error %d reading %x\n", ret, *cmd); + return ret; + } + + spi_release_bus(spi); + + return ret; +} + +static int m25p80_write(struct spi_nor *nor, const u8 *cmd, size_t cmd_len, + const void *data, size_t data_len) +{ + struct m25p *flash = nor->priv; + struct spi_slave *spi = flash->spi; + int ret; + + ret = spi_claim_bus(spi); + if (ret < 0) { + debug("m25p80: unable to claim SPI bus\n"); + return ret; + } + + if (nor->flags & SNOR_F_U_PAGE) + spi->flags |= SPI_XFER_U_PAGE; + + ret = spi_read_then_write(spi, cmd, cmd_len, data, NULL, data_len); + if (ret < 0) { + debug("m25p80: error %d writing %x\n", ret, *cmd); + return ret; + } + + spi_release_bus(spi); + + return ret; +} static int m25p_probe(struct udevice *dev) { struct spi_slave *spi = dev_get_parent_priv(dev); struct mtd_info *mtd = dev_get_uclass_priv(dev); + struct m25p *flash = dev_get_priv(dev); + struct spi_nor *nor; + int ret; + + nor = &flash->spi_nor; + + /* install hooks */ + nor->read_mmap = m25p80_read_mmap; + nor->read = m25p80_read; + nor->write = m25p80_write; + nor->read_reg = m25p80_read_reg; + nor->write_reg = m25p80_write_reg; + + nor->mtd = mtd; + nor->priv = flash; + flash->spi = spi; + + /* claim spi bus */ + ret = spi_claim_bus(spi); + if (ret) { + debug("m25p80: failed to claim SPI bus: %d\n", ret); + return ret; + } + + switch (spi->mode_rx) { + case SPI_RX_SLOW: + nor->read_mode = SNOR_READ; + break; + case SPI_RX_DUAL: + nor->read_mode = SNOR_READ_1_1_2; + break; + case SPI_RX_QUAD: + nor->read_mode = SNOR_READ_1_1_4; + break; + } + + switch (spi->mode) { + case SPI_TX_BYTE: + nor->mode = SNOR_WRITE_1_1_BYTE; + break; + case SPI_TX_QUAD: + nor->mode = SNOR_WRITE_1_1_4; + break; + } + + nor->memory_map = spi->memory_map; + nor->max_write_size = spi->max_write_size; + + /* TODO: unrelated to spi_slave{} */ + if (spi->option & SPI_CONN_DUAL_SHARED) + nor->dual = SNOR_DUAL_STACKED; + else if (spi->option & SPI_CONN_DUAL_SEPARATED) + nor->dual = SNOR_DUAL_PARALLEL; + + ret = spi_nor_scan(nor); + if (ret) + goto err_scan; + + ret = add_mtd_device(mtd); + if (ret) + goto err_mtd; return 0; + +err_scan: + spi_release_bus(spi); +err_mtd: + spi_free_slave(spi); + device_remove(dev); + return ret; } static const struct udevice_id m25p_ids[] = { @@ -34,4 +269,5 @@ U_BOOT_DRIVER(m25p80) = { .id = UCLASS_MTD, .of_match = m25p_ids, .probe = m25p_probe, + .priv_auto_alloc_size = sizeof(struct m25p), };