diff mbox

[U-Boot,v2,14/55] x86: ivybridge: Probe the LPC in CPU init

Message ID 1453072320-24298-15-git-send-email-sjg@chromium.org
State Accepted
Commit f633efa30f6119c9cecb045e7edeb01554800d84
Delegated to: Bin Meng
Headers show

Commit Message

Simon Glass Jan. 17, 2016, 11:11 p.m. UTC
We can drop the explicit probe of the PCH since the LPC is a child device
and this will happen automatically.

Signed-off-by: Simon Glass <sjg@chromium.org>
---

Changes in v2:
- Drop explicit PCH probe
- Drop LPC init method
- Rename patch from 'Add an init() method for the bd82x6x LPC'

 arch/x86/cpu/ivybridge/cpu.c | 5 ++---
 1 file changed, 2 insertions(+), 3 deletions(-)

Comments

Bin Meng Jan. 21, 2016, 6:25 a.m. UTC | #1
On Mon, Jan 18, 2016 at 7:11 AM, Simon Glass <sjg@chromium.org> wrote:
> We can drop the explicit probe of the PCH since the LPC is a child device
> and this will happen automatically.
>
> Signed-off-by: Simon Glass <sjg@chromium.org>
> ---
>
> Changes in v2:
> - Drop explicit PCH probe
> - Drop LPC init method
> - Rename patch from 'Add an init() method for the bd82x6x LPC'
>
>  arch/x86/cpu/ivybridge/cpu.c | 5 ++---
>  1 file changed, 2 insertions(+), 3 deletions(-)
>

Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Bin Meng Jan. 21, 2016, 7:59 a.m. UTC | #2
On Thu, Jan 21, 2016 at 2:25 PM, Bin Meng <bmeng.cn@gmail.com> wrote:
> On Mon, Jan 18, 2016 at 7:11 AM, Simon Glass <sjg@chromium.org> wrote:
>> We can drop the explicit probe of the PCH since the LPC is a child device
>> and this will happen automatically.
>>
>> Signed-off-by: Simon Glass <sjg@chromium.org>
>> ---
>>
>> Changes in v2:
>> - Drop explicit PCH probe
>> - Drop LPC init method
>> - Rename patch from 'Add an init() method for the bd82x6x LPC'
>>
>>  arch/x86/cpu/ivybridge/cpu.c | 5 ++---
>>  1 file changed, 2 insertions(+), 3 deletions(-)
>>
>
> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

applied to u-boot-x86/master, thanks!
diff mbox

Patch

diff --git a/arch/x86/cpu/ivybridge/cpu.c b/arch/x86/cpu/ivybridge/cpu.c
index f32b4a1..65eea1f 100644
--- a/arch/x86/cpu/ivybridge/cpu.c
+++ b/arch/x86/cpu/ivybridge/cpu.c
@@ -212,7 +212,7 @@  int print_cpuinfo(void)
 {
 	enum pei_boot_mode_t boot_mode = PEI_BOOT_NONE;
 	char processor_name[CPU_MAX_NAME_LEN];
-	struct udevice *dev;
+	struct udevice *dev, *lpc;
 	const char *name;
 	uint32_t pm1_cnt;
 	uint16_t pm1_sts;
@@ -245,12 +245,11 @@  int print_cpuinfo(void)
 	/* Early chipset init required before RAM init can work */
 	uclass_first_device(UCLASS_NORTHBRIDGE, &dev);
 
-	ret = uclass_first_device(UCLASS_PCH, &dev);
+	ret = uclass_first_device(UCLASS_LPC, &lpc);
 	if (ret)
 		return ret;
 	if (!dev)
 		return -ENODEV;
-
 	sandybridge_early_init(SANDYBRIDGE_MOBILE);
 
 	/* Check PM1_STS[15] to see if we are waking from Sx */