From patchwork Tue Jan 5 05:56:22 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peng Fan X-Patchwork-Id: 562961 X-Patchwork-Delegate: sbabic@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id C394E1402ED for ; Tue, 5 Jan 2016 17:17:07 +1100 (AEDT) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b=ViQqmIyV; dkim-atps=neutral Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id B03BC4B813; Tue, 5 Jan 2016 07:16:14 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 3NqQRzIQeNRA; Tue, 5 Jan 2016 07:16:14 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id B9D194B899; Tue, 5 Jan 2016 07:15:59 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id A764E4B890 for ; Tue, 5 Jan 2016 07:15:57 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id DJ2mTtPLzxjT for ; Tue, 5 Jan 2016 07:15:57 +0100 (CET) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail-pf0-f173.google.com (mail-pf0-f173.google.com [209.85.192.173]) by theia.denx.de (Postfix) with ESMTPS id 1DDB24B7FB for ; Tue, 5 Jan 2016 07:15:43 +0100 (CET) Received: by mail-pf0-f173.google.com with SMTP id q63so178834653pfb.0 for ; Mon, 04 Jan 2016 22:15:43 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=hm2gJn46i+MB9hNN2rzwzlmgahquPxeO9s1bzz7EObg=; b=ViQqmIyVzpn4y6dr9nGbR7zO059xXiQAW6mPoRI0nQzgIMYSk5vEW6utOp6IH8ooMh SA42Y1g3ZFSkrzQ3vUiDsqmQrc5yyy/htXL16QjrrBFvBQgV6TEIN081A/x305JRpG3s r3wAMQEq1jFYEBXzws183qQkWtnGBjFC2Vyoimr+Yv+xL1vPpKIQvabE194taU70QbNN QogsHvtFrBDobQdtXmhvXkgtoq/HC3Yxh9e1xscOY+OQuj+w/dtTq2t0/kxYTR8bZT9V 7k6jFThcbD/M8pSsWeof5G2Kg/3p4rUdfAnpMaCjL57rGyBPjdJR+ZXR54DmOwiA4WHT eOrw== X-Received: by 10.98.7.92 with SMTP id b89mr131561246pfd.69.1451974542115; Mon, 04 Jan 2016 22:15:42 -0800 (PST) Received: from linux-7smt.suse (gate-zmy3.freescale.com. [192.88.167.1]) by smtp.gmail.com with ESMTPSA id tv6sm76015814pab.4.2016.01.04.22.15.38 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 04 Jan 2016 22:15:41 -0800 (PST) From: Peng Fan To: u-boot@lists.denx.de Date: Tue, 5 Jan 2016 13:56:22 +0800 Message-Id: <1451973384-26824-10-git-send-email-van.freenix@gmail.com> X-Mailer: git-send-email 2.6.2 In-Reply-To: <1451973384-26824-1-git-send-email-van.freenix@gmail.com> References: <1451973384-26824-1-git-send-email-van.freenix@gmail.com> Cc: fabio.estevam@freescale.com, ye.li@nxp.com Subject: [U-Boot] [PATCH 09/11] imx: mx7: implement functions to boot auxiliary core X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.15 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" From: Peng Fan Implement arch_auxiliary_core_up and arch_auxiliary_core_check_up. arch_auxiliary_core_check_up is used to check whether M4 is running or not. arch_auxiliary_core_up is to boot M4 core, the m4 core will use the pc and stack which is set in arch_auxiliary_core_up to set R15 and R13 register and boot. Signed-off-by: Ye.Li Signed-off-by: Peng Fan --- arch/arm/cpu/armv7/mx7/soc.c | 36 ++++++++++++++++++++++++++++++++ arch/arm/include/asm/arch-mx7/imx-regs.h | 5 +++++ 2 files changed, 41 insertions(+) diff --git a/arch/arm/cpu/armv7/mx7/soc.c b/arch/arm/cpu/armv7/mx7/soc.c index 1d8e470..2121ff2 100644 --- a/arch/arm/cpu/armv7/mx7/soc.c +++ b/arch/arm/cpu/armv7/mx7/soc.c @@ -211,6 +211,42 @@ void imx_get_mac_from_fuse(int dev_id, unsigned char *mac) } #endif +#ifdef CONFIG_IMX_BOOTAUX +int arch_auxiliary_core_up(u32 core_id, u32 boot_private_data) +{ + u32 stack, pc; + struct src *src_reg = (struct src *)SRC_BASE_ADDR; + + if (!boot_private_data) + return 1; + + stack = *(u32 *)boot_private_data; + pc = *(u32 *)(boot_private_data + 4); + + /* Set the stack and pc to M4 bootROM */ + writel(stack, M4_BOOTROM_BASE_ADDR); + writel(pc, M4_BOOTROM_BASE_ADDR + 4); + + /* Enable M4 */ + clrsetbits_le32(&src_reg->m4rcr, SRC_M4RCR_M4C_NON_SCLR_RST_MASK, + SRC_M4RCR_ENABLE_M4_MASK); + + return 0; +} + +int arch_auxiliary_core_check_up(u32 core_id) +{ + uint32_t val; + struct src *src_reg = (struct src *)SRC_BASE_ADDR; + + val = readl(&src_reg->m4rcr); + if (val & 0x00000001) + return 0; /* assert in reset */ + + return 1; +} +#endif + void set_wdog_reset(struct wdog_regs *wdog) { u32 reg = readw(&wdog->wcr); diff --git a/arch/arm/include/asm/arch-mx7/imx-regs.h b/arch/arm/include/asm/arch-mx7/imx-regs.h index 8e66d3d..5253b1e 100644 --- a/arch/arm/include/asm/arch-mx7/imx-regs.h +++ b/arch/arm/include/asm/arch-mx7/imx-regs.h @@ -260,6 +260,11 @@ struct src { u32 ddrc_rcr; }; +#define SRC_M4RCR_M4C_NON_SCLR_RST_OFFSET 0 +#define SRC_M4RCR_M4C_NON_SCLR_RST_MASK (1 << 0) +#define SRC_M4RCR_ENABLE_M4_OFFSET 3 +#define SRC_M4RCR_ENABLE_M4_MASK (1 << 3) + /* GPR0 Bit Fields */ #define IOMUXC_GPR_GPR0_DMAREQ_MUX_SEL0_MASK 0x1u #define IOMUXC_GPR_GPR0_DMAREQ_MUX_SEL0_SHIFT 0