| Message ID | 1450783123-23502-1-git-send-email-pratiyush.srivastava@freescale.com |
|---|---|
| State | Accepted |
| Commit | aa4ba7f7a276566f4d0814c41314a629050c6208 |
| Delegated to: | York Sun |
| Headers | show |
> -----Original Message----- > From: Pratiyush Srivastava > Sent: Tuesday, December 22, 2015 4:49 PM > To: u-boot@lists.denx.de > Cc: Yusong Sun <yorksun@freescale.com>; Prabhakar Kushwaha > <prabhakar@freescale.com>; Pratiyush Srivastava > <pratiyush.srivastava@freescale.com> > Subject: [PATCH] armv8: ls2040a: Add support of LS2040A SoC > > Freescale's LS2040A is a another personality of LS2080A SoC without AIOP > support consisting of 4 armv8 cores. > > Signed-off-by: Pratiyush Mohan Srivastava > <pratiyush.srivastava@freescale.com> > --- > arch/arm/include/asm/arch-fsl-layerscape/cpu.h | 1 + > arch/arm/include/asm/arch-fsl-layerscape/soc.h | 1 + > 2 files changed, 2 insertions(+) > > diff --git a/arch/arm/include/asm/arch-fsl-layerscape/cpu.h > b/arch/arm/include/asm/arch-fsl-layerscape/cpu.h > index e030430..b10ee43 100644 > --- a/arch/arm/include/asm/arch-fsl-layerscape/cpu.h > +++ b/arch/arm/include/asm/arch-fsl-layerscape/cpu.h > @@ -12,6 +12,7 @@ static struct cpu_type cpu_type_list[] = { > CPU_TYPE_ENTRY(LS2085, LS2085, 8), > CPU_TYPE_ENTRY(LS2045, LS2045, 4), > CPU_TYPE_ENTRY(LS1043, LS1043, 4), > + CPU_TYPE_ENTRY(LS2040, LS2040, 4), > }; > > #ifndef CONFIG_SYS_DCACHE_OFF > diff --git a/arch/arm/include/asm/arch-fsl-layerscape/soc.h > b/arch/arm/include/asm/arch-fsl-layerscape/soc.h > index 1565592..ea78e15 100644 > --- a/arch/arm/include/asm/arch-fsl-layerscape/soc.h > +++ b/arch/arm/include/asm/arch-fsl-layerscape/soc.h > @@ -45,6 +45,7 @@ struct cpu_type { > #define SVR_LS2045 0x870120 > #define SVR_LS2080 0x870110 > #define SVR_LS2085 0x870100 > +#define SVR_LS2040 0x870130 > > #define SVR_MAJ(svr) (((svr) >> 4) & 0xf) > #define SVR_MIN(svr) (((svr) >> 0) & 0xf) > -- Acked-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> --prabhakar
On 12/22/2015 03:18 AM, Pratiyush Srivastava wrote: > Freescale's LS2040A is a another personality of LS2080A SoC > without AIOP support consisting of 4 armv8 cores. > > Signed-off-by: Pratiyush Mohan Srivastava <pratiyush.srivastava@freescale.com> > --- > arch/arm/include/asm/arch-fsl-layerscape/cpu.h | 1 + > arch/arm/include/asm/arch-fsl-layerscape/soc.h | 1 + > 2 files changed, 2 insertions(+) Applied to u-boot-fsl-qoriq master. Awaiting upstream. Thanks. York
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/cpu.h b/arch/arm/include/asm/arch-fsl-layerscape/cpu.h index e030430..b10ee43 100644 --- a/arch/arm/include/asm/arch-fsl-layerscape/cpu.h +++ b/arch/arm/include/asm/arch-fsl-layerscape/cpu.h @@ -12,6 +12,7 @@ static struct cpu_type cpu_type_list[] = { CPU_TYPE_ENTRY(LS2085, LS2085, 8), CPU_TYPE_ENTRY(LS2045, LS2045, 4), CPU_TYPE_ENTRY(LS1043, LS1043, 4), + CPU_TYPE_ENTRY(LS2040, LS2040, 4), }; #ifndef CONFIG_SYS_DCACHE_OFF diff --git a/arch/arm/include/asm/arch-fsl-layerscape/soc.h b/arch/arm/include/asm/arch-fsl-layerscape/soc.h index 1565592..ea78e15 100644 --- a/arch/arm/include/asm/arch-fsl-layerscape/soc.h +++ b/arch/arm/include/asm/arch-fsl-layerscape/soc.h @@ -45,6 +45,7 @@ struct cpu_type { #define SVR_LS2045 0x870120 #define SVR_LS2080 0x870110 #define SVR_LS2085 0x870100 +#define SVR_LS2040 0x870130 #define SVR_MAJ(svr) (((svr) >> 4) & 0xf) #define SVR_MIN(svr) (((svr) >> 0) & 0xf)
Freescale's LS2040A is a another personality of LS2080A SoC without AIOP support consisting of 4 armv8 cores. Signed-off-by: Pratiyush Mohan Srivastava <pratiyush.srivastava@freescale.com> --- arch/arm/include/asm/arch-fsl-layerscape/cpu.h | 1 + arch/arm/include/asm/arch-fsl-layerscape/soc.h | 1 + 2 files changed, 2 insertions(+)