From patchwork Sun Dec 20 03:00:41 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marek Vasut X-Patchwork-Id: 559297 X-Patchwork-Delegate: marek.vasut@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 4B03114031B for ; Sun, 20 Dec 2015 14:00:58 +1100 (AEDT) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id DF2DE4B73A; Sun, 20 Dec 2015 04:00:56 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id RQagjtckWnt4; Sun, 20 Dec 2015 04:00:56 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 650064B6DF; Sun, 20 Dec 2015 04:00:56 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 8B6984B6DF for ; Sun, 20 Dec 2015 04:00:54 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id Plr3k5dLO6Xz for ; Sun, 20 Dec 2015 04:00:54 +0100 (CET) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail-out.m-online.net (mail-out.m-online.net [212.18.0.9]) by theia.denx.de (Postfix) with ESMTPS id 5FDD64B6B4 for ; Sun, 20 Dec 2015 04:00:52 +0100 (CET) Received: from mail.nefkom.net (unknown [192.168.8.184]) by mail-out.m-online.net (Postfix) with ESMTP id 3pNTFw4Qzsz3hj25; Sun, 20 Dec 2015 04:00:52 +0100 (CET) X-Auth-Info: Z3+I4FUBHoD8rjK0b+el3rJnGgdbzwaedCIpBXrjoSQ= Received: from chi.lan (unknown [195.140.253.167]) by smtp-auth.mnet-online.de (Postfix) with ESMTPA id 3pNTFw2WnRzvdWS; Sun, 20 Dec 2015 04:00:52 +0100 (CET) From: Marek Vasut To: u-boot@lists.denx.de Date: Sun, 20 Dec 2015 04:00:41 +0100 Message-Id: <1450580446-6435-1-git-send-email-marex@denx.de> X-Mailer: git-send-email 2.1.4 Cc: Marek Vasut Subject: [U-Boot] [PATCH 1/6] arm: socfpga: Define NAND reset bit X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.15 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Define the NAND reset bit and fix the ordering of the macros. Signed-off-by: Marek Vasut Cc: Dinh Nguyen --- arch/arm/mach-socfpga/include/mach/reset_manager.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/arm/mach-socfpga/include/mach/reset_manager.h b/arch/arm/mach-socfpga/include/mach/reset_manager.h index e50fbd8..2f070f2 100644 --- a/arch/arm/mach-socfpga/include/mach/reset_manager.h +++ b/arch/arm/mach-socfpga/include/mach/reset_manager.h @@ -65,12 +65,13 @@ struct socfpga_reset_manager { */ #define RSTMGR_EMAC0 RSTMGR_DEFINE(1, 0) #define RSTMGR_EMAC1 RSTMGR_DEFINE(1, 1) +#define RSTMGR_NAND RSTMGR_DEFINE(1, 4) +#define RSTMGR_QSPI RSTMGR_DEFINE(1, 5) #define RSTMGR_L4WD0 RSTMGR_DEFINE(1, 6) #define RSTMGR_OSC1TIMER0 RSTMGR_DEFINE(1, 8) #define RSTMGR_UART0 RSTMGR_DEFINE(1, 16) #define RSTMGR_SPIM0 RSTMGR_DEFINE(1, 18) #define RSTMGR_SPIM1 RSTMGR_DEFINE(1, 19) -#define RSTMGR_QSPI RSTMGR_DEFINE(1, 5) #define RSTMGR_SDMMC RSTMGR_DEFINE(1, 22) #define RSTMGR_DMA RSTMGR_DEFINE(1, 28) #define RSTMGR_SDR RSTMGR_DEFINE(1, 29)