From patchwork Thu Dec 17 04:12:31 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Simon Glass X-Patchwork-Id: 558047 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id D88A81401DA for ; Thu, 17 Dec 2015 15:14:08 +1100 (AEDT) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=google.com header.i=@google.com header.b=dtP4HEz6; dkim-atps=neutral Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id ADC0C4BD8E; Thu, 17 Dec 2015 05:13:37 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id tyP1mlPLXfuV; Thu, 17 Dec 2015 05:13:37 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id DA17AA7551; Thu, 17 Dec 2015 05:13:19 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 6A8624BD83 for ; Thu, 17 Dec 2015 05:12:50 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id sv-sQTz-CyhS for ; Thu, 17 Dec 2015 05:12:50 +0100 (CET) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail-ob0-f171.google.com (mail-ob0-f171.google.com [209.85.214.171]) by theia.denx.de (Postfix) with ESMTPS id 994C74BD8E for ; Thu, 17 Dec 2015 05:12:42 +0100 (CET) Received: by mail-ob0-f171.google.com with SMTP id no2so48409757obc.3 for ; Wed, 16 Dec 2015 20:12:42 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references; bh=K0njMhhIDAC/0zfctc3biiI06TdqrYUydm1+m3XzFSY=; b=dtP4HEz6wxN6K55gfCORnUEFPOHU2bjCX13q2AdODrFvhpl5o2d5OZMJXO+NzN1Kmz J5VKCigeg/Z8kHVffYW79QdrlZOu4vHax/DWMVdryLVnmBV1VyOQ23N5Fvsi7Am0SOrV gbqGP5LnrGZuOGhraNV/ANbqYTXbu2KKWI4MzLrJ/NzfNBZdJs3miuZzmcZaRi94Wpkw UireQlbK4zoaL2LsafVNo1/Mg0scQDnUMxaJuyJoQPjpEAYhwk13CpRx3ABISvYiNEuO miGUnOXHXrlhkViGdn0GMi2o6nGBGt+jKWh/AYmy97qIJf2kiNY/orfMFIOd5xiCFgls qifQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references; bh=K0njMhhIDAC/0zfctc3biiI06TdqrYUydm1+m3XzFSY=; b=j0HuDrpOOBelIyN3Z2W5LcsdiJbrQ39X8mFeJ6ahJ05ucgwf7P8Yav12GdmJa3YSes NAbnNnLH6t00Dkzx/5ozw/Y20Gn39WCvp9J0bPJ5z0mCaVfVsgRFmxN7uh91N0cakxXQ s4+bkRqzEtjb3jJBMvvcL1kcXlnq+3YNVfmtB/ssPxjy9kJl5sNETVxMgQSrWBzO6Tty i+NbmjS88bAu62zil6WyHN87SB/JWANt0vf4qXpm/wSxaV6xiVCBOUeE1WugWpFGn5Bi iMN0sdBYiIeNvFNXt6XP3FNOgAOmSM2s7xZET3XMRe68MTLjQ8tYdhIBJ7usK0oH/li2 sfZA== X-Gm-Message-State: ALoCoQnyutou3NP3O8Pjc2BEP1/3qSmdc5e9z0eF54ymAmQ5qcx1rBjec/fIyOPjdZxVzFVwWHcdA8FC3Cam/MxOiXFWC3PYsQ== X-Received: by 10.60.39.33 with SMTP id m1mr37189223oek.77.1450325561057; Wed, 16 Dec 2015 20:12:41 -0800 (PST) Received: from kaki.bld.corp.google.com ([172.29.216.32]) by smtp.gmail.com with ESMTPSA id gv8sm2814026obb.20.2015.12.16.20.12.39 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 16 Dec 2015 20:12:40 -0800 (PST) Received: by kaki.bld.corp.google.com (Postfix, from userid 121222) id 0368B220A86; Wed, 16 Dec 2015 21:12:38 -0700 (MST) From: Simon Glass To: U-Boot Mailing List Date: Wed, 16 Dec 2015 21:12:31 -0700 Message-Id: <1450325556-12403-3-git-send-email-sjg@chromium.org> X-Mailer: git-send-email 2.6.0.rc2.230.g3dd15c0 In-Reply-To: <1450325556-12403-1-git-send-email-sjg@chromium.org> References: <1450325556-12403-1-git-send-email-sjg@chromium.org> Subject: [U-Boot] [PATCH v2 2/7] dm: pci: Add a function to write a BAR X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.15 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Add a driver-model version of the pci_write_bar32 function so that this is supported in the new API. Signed-off-by: Simon Glass --- Changes in v2: - Rename the last parameter to 'addr' - Update the comment to explain usable of this function drivers/pci/pci-uclass.c | 8 ++++++++ include/pci.h | 17 +++++++++++++++-- 2 files changed, 23 insertions(+), 2 deletions(-) diff --git a/drivers/pci/pci-uclass.c b/drivers/pci/pci-uclass.c index 6dd4883..61292d7 100644 --- a/drivers/pci/pci-uclass.c +++ b/drivers/pci/pci-uclass.c @@ -1053,6 +1053,14 @@ u32 dm_pci_read_bar32(struct udevice *dev, int barnum) return addr & PCI_BASE_ADDRESS_MEM_MASK; } +void dm_pci_write_bar32(struct udevice *dev, int barnum, u32 addr) +{ + int bar; + + bar = PCI_BASE_ADDRESS_0 + barnum * 4; + dm_pci_write_config32(dev, bar, addr); +} + static int _dm_pci_bus_to_phys(struct udevice *ctlr, pci_addr_t bus_addr, unsigned long flags, unsigned long skip_mask, phys_addr_t *pa) diff --git a/include/pci.h b/include/pci.h index cb2562f..96f9189 100644 --- a/include/pci.h +++ b/include/pci.h @@ -757,7 +757,9 @@ extern void pci_mpc85xx_init (struct pci_controller *hose); /** * pci_write_bar32() - Write the address of a BAR including control bits * - * This writes a raw address (with control bits) to a bar + * This writes a raw address (with control bits) to a bar. This can be used + * with devices which require hard-coded addresses, not part of the normal + * PCI enumeration process. * * @hose: PCI hose to use * @dev: PCI device to update @@ -765,7 +767,7 @@ extern void pci_mpc85xx_init (struct pci_controller *hose); * @addr: BAR address with control bits */ void pci_write_bar32(struct pci_controller *hose, pci_dev_t dev, int barnum, - u32 addr_and_ctrl); + u32 addr); /** * pci_read_bar32() - read the address of a bar @@ -1167,6 +1169,17 @@ int pci_get_regions(struct udevice *dev, struct pci_region **iop, struct pci_region **memp, struct pci_region **prefp); /** + * dm_pci_write_bar32() - Write the address of a BAR including control bits + * + * This writes a raw address (with control bits) to a bar + * + * @dev: PCI device to update + * @barnum: BAR number (0-5) + * @addr: BAR address with control bits + */ +void dm_pci_write_bar32(struct udevice *dev, int barnum, u32 addr_and_ctrl); + +/** * dm_pci_read_bar32() - read a base address register from a device * * @dev: Device to check