From patchwork Tue Dec 15 00:09:24 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mateusz Kulikowski X-Patchwork-Id: 556744 X-Patchwork-Delegate: marek.vasut@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 248181402BD for ; Tue, 15 Dec 2015 11:10:48 +1100 (AEDT) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b=XAjtQIt0; dkim-atps=neutral Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id EF9D24BAC9; Tue, 15 Dec 2015 01:10:09 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id GX6PkZaz74Ut; Tue, 15 Dec 2015 01:10:09 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id A42E64BADC; Tue, 15 Dec 2015 01:10:01 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 582024BAA7 for ; Tue, 15 Dec 2015 01:09:53 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id foYtn4FMj5gc for ; Tue, 15 Dec 2015 01:09:53 +0100 (CET) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail-lb0-f181.google.com (mail-lb0-f181.google.com [209.85.217.181]) by theia.denx.de (Postfix) with ESMTPS id 1FF574BAA2 for ; Tue, 15 Dec 2015 01:09:50 +0100 (CET) Received: by lbblt2 with SMTP id lt2so118163910lbb.3 for ; Mon, 14 Dec 2015 16:09:49 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=t+xAf3hhSBjedoMp3toaGfa5YoaetEeR8ezjnbH4520=; b=XAjtQIt0HT4zTOrcY5I1d3c4HMKsw9UR0KeOG/Gdo3YQZ/Rx3c+0c/PYiNE6ZezrRb TE5DyZtqqqSynkhYdpgSmT5xdPz3Us92q+S3ACWcUmwczf9NPGC+Swrz6sbILcXJxId0 FqLLFufEaicHZVQoWrRUB6Jmst5TRK5hL245IgYWjcnVi7qXt47reoZD8Q1OocvI9T0M tfmJvXXGDX7MGv2Gz3XTD6oL/DvFgMfcIPGiHr4q9UE+wLnK8gwMh1lRn3wX5rEU1KZV dGoj8uJIreddbQldU5+09C5ac+6bcTwdq3sN5W2pZsGCpGWY/tBqJt5BgA5Zd/uyx/hu gnfQ== X-Received: by 10.112.12.193 with SMTP id a1mr15003269lbc.52.1450138189621; Mon, 14 Dec 2015 16:09:49 -0800 (PST) Received: from localhost.localdomain (095160097038.warszawa.vectranet.pl. [95.160.97.38]) by smtp.gmail.com with ESMTPSA id k15sm3755395lfe.35.2015.12.14.16.09.48 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 14 Dec 2015 16:09:49 -0800 (PST) From: Mateusz Kulikowski To: u-boot@lists.denx.de, Marek Vasut , Joe Hershberger Date: Tue, 15 Dec 2015 01:09:24 +0100 Message-Id: <1450138168-25102-3-git-send-email-mateusz.kulikowski@gmail.com> X-Mailer: git-send-email 2.5.0 In-Reply-To: <1450138168-25102-1-git-send-email-mateusz.kulikowski@gmail.com> References: <1450138168-25102-1-git-send-email-mateusz.kulikowski@gmail.com> Subject: [U-Boot] [PATCH 2/5] usb: dwc2: Use shared wait_for_bit X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.15 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Use existing library function to poll bit(s). Update configs using dwc2. Signed-off-by: Mateusz Kulikowski --- drivers/usb/host/dwc2.c | 43 +++++++++++++++------------------------- include/configs/hikey.h | 1 + include/configs/rpi-common.h | 1 + include/configs/socfpga_common.h | 1 + 4 files changed, 19 insertions(+), 27 deletions(-) diff --git a/drivers/usb/host/dwc2.c b/drivers/usb/host/dwc2.c index 541c0f9..d1c9c45 100644 --- a/drivers/usb/host/dwc2.c +++ b/drivers/usb/host/dwc2.c @@ -13,6 +13,7 @@ #include #include #include +#include #include #include "dwc2.h" @@ -52,27 +53,10 @@ static struct dwc2_priv local; /* * DWC2 IP interface */ -static int wait_for_bit(void *reg, const uint32_t mask, bool set) -{ - unsigned int timeout = 1000000; - uint32_t val; - - while (--timeout) { - val = readl(reg); - if (!set) - val = ~val; - - if ((val & mask) == mask) - return 0; - - udelay(1); - } - - debug("%s: Timeout (reg=%p mask=%08x wait_set=%i)\n", - __func__, reg, mask, set); - return -ETIMEDOUT; -} +#ifndef CONFIG_LIB_WAIT_BIT +#error CONFIG_LIB_WAIT_BIT is required for dwc2 driver +#endif /* * Initializes the FSLSPClkSel field of the HCFG register @@ -117,7 +101,8 @@ static void dwc_otg_flush_tx_fifo(struct dwc2_core_regs *regs, const int num) writel(DWC2_GRSTCTL_TXFFLSH | (num << DWC2_GRSTCTL_TXFNUM_OFFSET), ®s->grstctl); - ret = wait_for_bit(®s->grstctl, DWC2_GRSTCTL_TXFFLSH, 0); + ret = wait_for_bit(__func__, ®s->grstctl, DWC2_GRSTCTL_TXFFLSH, + false, 1000, false); if (ret) printf("%s: Timeout!\n", __func__); @@ -135,7 +120,8 @@ static void dwc_otg_flush_rx_fifo(struct dwc2_core_regs *regs) int ret; writel(DWC2_GRSTCTL_RXFFLSH, ®s->grstctl); - ret = wait_for_bit(®s->grstctl, DWC2_GRSTCTL_RXFFLSH, 0); + ret = wait_for_bit(__func__, ®s->grstctl, DWC2_GRSTCTL_RXFFLSH, + false, 1000, false); if (ret) printf("%s: Timeout!\n", __func__); @@ -152,13 +138,15 @@ static void dwc_otg_core_reset(struct dwc2_core_regs *regs) int ret; /* Wait for AHB master IDLE state. */ - ret = wait_for_bit(®s->grstctl, DWC2_GRSTCTL_AHBIDLE, 1); + ret = wait_for_bit(__func__, ®s->grstctl, DWC2_GRSTCTL_AHBIDLE, + true, 1000, false); if (ret) printf("%s: Timeout!\n", __func__); /* Core Soft Reset */ writel(DWC2_GRSTCTL_CSFTRST, ®s->grstctl); - ret = wait_for_bit(®s->grstctl, DWC2_GRSTCTL_CSFTRST, 0); + ret = wait_for_bit(__func__, ®s->grstctl, DWC2_GRSTCTL_CSFTRST, + false, 1000, false); if (ret) printf("%s: Timeout!\n", __func__); @@ -243,8 +231,8 @@ static void dwc_otg_core_host_init(struct dwc2_core_regs *regs) clrsetbits_le32(®s->hc_regs[i].hcchar, DWC2_HCCHAR_EPDIR, DWC2_HCCHAR_CHEN | DWC2_HCCHAR_CHDIS); - ret = wait_for_bit(®s->hc_regs[i].hcchar, - DWC2_HCCHAR_CHEN, 0); + ret = wait_for_bit(__func__, ®s->hc_regs[i].hcchar, + DWC2_HCCHAR_CHEN, false, 1000, false); if (ret) printf("%s: Timeout!\n", __func__); } @@ -737,7 +725,8 @@ int wait_for_chhltd(struct dwc2_core_regs *regs, uint32_t *sub, int *toggle, int ret; uint32_t hcint, hctsiz; - ret = wait_for_bit(&hc_regs->hcint, DWC2_HCINT_CHHLTD, true); + ret = wait_for_bit(__func__, &hc_regs->hcint, DWC2_HCINT_CHHLTD, true, + 1000, false); if (ret) return ret; diff --git a/include/configs/hikey.h b/include/configs/hikey.h index 796861e..4e3bfec 100644 --- a/include/configs/hikey.h +++ b/include/configs/hikey.h @@ -66,6 +66,7 @@ #define CONFIG_CMD_USB #ifdef CONFIG_CMD_USB +#define CONFIG_LIB_WAIT_BIT #define CONFIG_USB_DWC2 #define CONFIG_USB_DWC2_REG_ADDR 0xF72C0000 /*#define CONFIG_DWC2_DFLT_SPEED_FULL*/ diff --git a/include/configs/rpi-common.h b/include/configs/rpi-common.h index 1b83eb3..70d6123 100644 --- a/include/configs/rpi-common.h +++ b/include/configs/rpi-common.h @@ -78,6 +78,7 @@ #define CONFIG_CMD_USB #ifdef CONFIG_CMD_USB +#define CONFIG_LIB_WAIT_BIT #define CONFIG_USB_DWC2 #ifdef CONFIG_BCM2836 #define CONFIG_USB_DWC2_REG_ADDR 0x3f980000 diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h index b3f65b6..47062cd 100644 --- a/include/configs/socfpga_common.h +++ b/include/configs/socfpga_common.h @@ -227,6 +227,7 @@ unsigned int cm_get_qspi_controller_clk_hz(void); * USB */ #ifdef CONFIG_CMD_USB +#define CONFIG_LIB_WAIT_BIT #define CONFIG_USB_DWC2 #define CONFIG_USB_STORAGE /*