From patchwork Mon Dec 14 11:58:46 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stefan Roese X-Patchwork-Id: 556415 X-Patchwork-Delegate: sr@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 7D7071402BF for ; Mon, 14 Dec 2015 23:01:14 +1100 (AEDT) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 03D064BA9A; Mon, 14 Dec 2015 13:00:05 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id q3SdDc8hOxrt; Mon, 14 Dec 2015 13:00:04 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 300D24BA9D; Mon, 14 Dec 2015 12:59:26 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 5E3054B9E8 for ; Mon, 14 Dec 2015 12:59:01 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id X-xcHRv4aCZI for ; Mon, 14 Dec 2015 12:59:01 +0100 (CET) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mo4-p05-ob.smtp.rzone.de (mo4-p05-ob.smtp.rzone.de [81.169.146.181]) by theia.denx.de (Postfix) with ESMTPS id 86FF84B98C for ; Mon, 14 Dec 2015 12:58:58 +0100 (CET) X-RZG-AUTH: :IW0NeWC7b/q2i6W/qstXb1SBUuFnrGohfvxEndrDXKjzPMsB3oimjD61I4fPQhgcz213 X-RZG-CLASS-ID: mo05 Received: from stefan-work.domain_not_set.invalid (b9168f50.cgn.dg-w.de [185.22.143.80]) by post.strato.de (RZmta 37.14 AUTH) with ESMTPA id z0565arBEBwoAVN; Mon, 14 Dec 2015 12:58:50 +0100 (CET) From: Stefan Roese To: u-boot@lists.denx.de Date: Mon, 14 Dec 2015 12:58:46 +0100 Message-Id: <1450094329-11674-11-git-send-email-sr@denx.de> X-Mailer: git-send-email 2.6.4 In-Reply-To: <1450094329-11674-1-git-send-email-sr@denx.de> References: <1450094329-11674-1-git-send-email-sr@denx.de> Cc: Luka Perkov Subject: [U-Boot] [PATCH 11/14] arm: mvebu: Add support for MV78260 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.15 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" This patch adds support for the dual core Armada XP variant, the MV78260. It has some minor differences to the 4-core MV78460, e.g. only 12 serdes lanes. Signed-off-by: Stefan Roese Cc: Luka Perkov Cc: Phil Sutter --- arch/arm/mach-mvebu/cpu.c | 5 +++- arch/arm/mach-mvebu/include/mach/soc.h | 1 + .../arm/mach-mvebu/serdes/axp/high_speed_env_lib.c | 28 ++++++++++++++++++---- 3 files changed, 29 insertions(+), 5 deletions(-) diff --git a/arch/arm/mach-mvebu/cpu.c b/arch/arm/mach-mvebu/cpu.c index 570966a..1095f69 100644 --- a/arch/arm/mach-mvebu/cpu.c +++ b/arch/arm/mach-mvebu/cpu.c @@ -50,7 +50,7 @@ int mvebu_soc_family(void) { u16 devid = (readl(MVEBU_REG_PCIE_DEVID) >> 16) & 0xffff; - if (devid == SOC_MV78460_ID) + if ((devid == SOC_MV78260_ID) || (devid == SOC_MV78460_ID)) return MVEBU_SOC_AXP; if (devid == SOC_88F6810_ID || devid == SOC_88F6820_ID || @@ -69,6 +69,9 @@ int print_cpuinfo(void) puts("SoC: "); switch (devid) { + case SOC_MV78260_ID: + puts("MV78260-"); + break; case SOC_MV78460_ID: puts("MV78460-"); break; diff --git a/arch/arm/mach-mvebu/include/mach/soc.h b/arch/arm/mach-mvebu/include/mach/soc.h index b78da25..5d4ad30 100644 --- a/arch/arm/mach-mvebu/include/mach/soc.h +++ b/arch/arm/mach-mvebu/include/mach/soc.h @@ -11,6 +11,7 @@ #ifndef _MVEBU_SOC_H #define _MVEBU_SOC_H +#define SOC_MV78260_ID 0x7826 #define SOC_MV78460_ID 0x7846 #define SOC_88F6810_ID 0x6810 #define SOC_88F6820_ID 0x6820 diff --git a/arch/arm/mach-mvebu/serdes/axp/high_speed_env_lib.c b/arch/arm/mach-mvebu/serdes/axp/high_speed_env_lib.c index 702273a..9762971 100644 --- a/arch/arm/mach-mvebu/serdes/axp/high_speed_env_lib.c +++ b/arch/arm/mach-mvebu/serdes/axp/high_speed_env_lib.c @@ -190,8 +190,15 @@ __weak MV_BIN_SERDES_CFG *board_serdes_cfg_get(u8 pex_mode) u16 ctrl_model_get(void) { - /* Right now only MV78460 supported */ + /* + * SoC version can't be autodetected. So we need to rely on a define + * from the config system here. + */ +#ifdef CONFIG_MV78260 + return MV_78260_DEV_ID; +#else return MV_78460_DEV_ID; +#endif } u32 get_line_cfg(u32 line_num, MV_BIN_SERDES_CFG *info) @@ -202,6 +209,18 @@ u32 get_line_cfg(u32 line_num, MV_BIN_SERDES_CFG *info) return (info->line8_15 >> ((line_num - 8) << 2)) & 0xF; } +static int serdes_max_lines_get(void) +{ + switch (ctrl_model_get()) { + case MV_78260_DEV_ID: + return 12; + case MV_78460_DEV_ID: + return 16; + } + + return 0; +} + int serdes_phy_config(void) { int status = MV_OK; @@ -226,10 +245,9 @@ int serdes_phy_config(void) u32 pex_if_num; /* - * TODO: - * Right now we only support the MV78460 with 16 serdes lines + * Get max. serdes lines count */ - max_serdes_lines = 16; + max_serdes_lines = serdes_max_lines_get(); if (max_serdes_lines == 0) return MV_OK; @@ -253,6 +271,8 @@ int serdes_phy_config(void) if ((u8) MV_ERROR == (u8) satr11) return MV_ERROR; break; + default: + satr11 = 0; } board_modules_scan();