From patchwork Fri Dec 11 10:55:45 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bin Meng X-Patchwork-Id: 555663 X-Patchwork-Delegate: bmeng.cn@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 2AF6414017E for ; Fri, 11 Dec 2015 21:53:40 +1100 (AEDT) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b=dZJ24gFL; dkim-atps=neutral Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 90DDD4B6DE; Fri, 11 Dec 2015 11:53:28 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id rNWeDWJu2Pcq; Fri, 11 Dec 2015 11:53:28 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id EF9A64B6A7; Fri, 11 Dec 2015 11:53:14 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 89B694B67F for ; Fri, 11 Dec 2015 11:53:07 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 4MD6dFTMvO4a for ; Fri, 11 Dec 2015 11:53:07 +0100 (CET) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail-pf0-f179.google.com (mail-pf0-f179.google.com [209.85.192.179]) by theia.denx.de (Postfix) with ESMTPS id 0D03D4B668 for ; Fri, 11 Dec 2015 11:53:02 +0100 (CET) Received: by pfnn128 with SMTP id n128so64611806pfn.0 for ; Fri, 11 Dec 2015 02:53:00 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:subject:date:message-id:in-reply-to:references; bh=li1RqjAYNLRBdY7bpMwoFEA+7fnGG76577cIlMstb6g=; b=dZJ24gFLY7yiS8wNtESa2XBthfAUfthRbwQ4J1fl02d/TQERm9Cf/8DL688qdwH2a8 XS9rZ5L46xw03n/yM7F2BzLnAPgOCAqdpf2bmXlLJUVmakED050tMEV17XVVWKPIsORx 9T1X6v52RTLqyVWyirz2ejlBYRFXV5n3hEIutfVB4A4+SFw6QOy9QvUAYANtvVHe7OBS H0u6RMYEulYBd+BrTKHFfBztw7DgptpEtFI2Iu7+QOlrA4LgSZ2bOmEdiP5MUsJDCHZk 2bvCtuu+Xy4o9q6crKchzvLoh6R4iwg8DobORsfIYuwMAYP35I9F2CQU3yDNweOh2jZR b6/g== X-Received: by 10.98.8.136 with SMTP id 8mr14348292pfi.16.1449831180788; Fri, 11 Dec 2015 02:53:00 -0800 (PST) Received: from ala-d2121-lx1.wrs.com (unknown-157-139.windriver.com. [147.11.157.139]) by smtp.gmail.com with ESMTPSA id w20sm24383441pfi.55.2015.12.11.02.52.59 (version=TLS1_1 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 11 Dec 2015 02:53:00 -0800 (PST) From: Bin Meng To: Simon Glass , U-Boot Mailing List Date: Fri, 11 Dec 2015 02:55:45 -0800 Message-Id: <1449831353-933-3-git-send-email-bmeng.cn@gmail.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1449831353-933-1-git-send-email-bmeng.cn@gmail.com> References: <1449831353-933-1-git-send-email-bmeng.cn@gmail.com> Subject: [U-Boot] [PATCH 02/10] x86: ivybridge: Add FSP support X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.15 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" IvyBridge FSP package is built with a base address at 0xfff80000, and does not use UPD data region. This adds basic FSP support. Signed-off-by: Bin Meng Acked-by: Simon Glass Tested-by: Simon Glass --- arch/x86/cpu/ivybridge/Kconfig | 8 ++++ arch/x86/cpu/ivybridge/Makefile | 4 ++ arch/x86/cpu/ivybridge/fsp_configs.c | 45 ++++++++++++++++++++++ arch/x86/cpu/ivybridge/ivybridge.c | 22 +++++++++++ .../include/asm/arch-ivybridge/fsp/fsp_configs.h | 40 +++++++++++++++++++ arch/x86/include/asm/arch-ivybridge/fsp/fsp_vpd.h | 12 ++++++ 6 files changed, 131 insertions(+) create mode 100644 arch/x86/cpu/ivybridge/fsp_configs.c create mode 100644 arch/x86/cpu/ivybridge/ivybridge.c create mode 100644 arch/x86/include/asm/arch-ivybridge/fsp/fsp_configs.h create mode 100644 arch/x86/include/asm/arch-ivybridge/fsp/fsp_vpd.h diff --git a/arch/x86/cpu/ivybridge/Kconfig b/arch/x86/cpu/ivybridge/Kconfig index 56abd8f..36b74c2 100644 --- a/arch/x86/cpu/ivybridge/Kconfig +++ b/arch/x86/cpu/ivybridge/Kconfig @@ -72,4 +72,12 @@ config ENABLE_VMX will be unable to support virtualisation, or it will run very slowly. +config FSP_ADDR + hex + default 0xfff80000 + +config FSP_USE_UPD + bool + default n + endif diff --git a/arch/x86/cpu/ivybridge/Makefile b/arch/x86/cpu/ivybridge/Makefile index 0c7efae..d74635e 100644 --- a/arch/x86/cpu/ivybridge/Makefile +++ b/arch/x86/cpu/ivybridge/Makefile @@ -4,6 +4,9 @@ # SPDX-License-Identifier: GPL-2.0+ # +ifdef CONFIG_HAVE_FSP +obj-y += fsp_configs.o ivybridge.o +else obj-y += bd82x6x.o obj-y += car.o obj-y += cpu.o @@ -22,3 +25,4 @@ obj-y += sata.o obj-y += sdram.o obj-y += usb_ehci.o obj-y += usb_xhci.o +endif diff --git a/arch/x86/cpu/ivybridge/fsp_configs.c b/arch/x86/cpu/ivybridge/fsp_configs.c new file mode 100644 index 0000000..5d8b814 --- /dev/null +++ b/arch/x86/cpu/ivybridge/fsp_configs.c @@ -0,0 +1,45 @@ +/* + * Copyright (C) 2015, Bin Meng + * + * SPDX-License-Identifier: Intel + */ + +#include +#include +#include + +DECLARE_GLOBAL_DATA_PTR; + +void update_fsp_configs(struct fsp_config_data *config, + struct fspinit_rtbuf *rt_buf) +{ + struct platform_config *plat_config = &config->plat_config; + struct memory_config *mem_config = &config->mem_config; + const void *blob = gd->fdt_blob; + int node; + + node = fdtdec_next_compatible(blob, 0, COMPAT_INTEL_IVYBRIDGE_FSP); + if (node < 0) { + debug("%s: Cannot find FSP node\n", __func__); + return; + } + + plat_config->enable_ht = + fdtdec_get_bool(blob, node, "fsp,enable-ht"); + plat_config->enable_turbo = + fdtdec_get_bool(blob, node, "fsp,enable-turbo"); + plat_config->enable_memory_down = + fdtdec_get_bool(blob, node, "fsp,enable-memory-down"); + plat_config->enable_fast_boot = + fdtdec_get_bool(blob, node, "fsp,enable-fast-boot"); + + /* Initialize runtime buffer for fsp_init() */ + rt_buf->stack_top = config->common.stack_top - 32; + rt_buf->boot_mode = config->common.boot_mode; + rt_buf->plat_config = plat_config; + + if (plat_config->enable_memory_down) + rt_buf->mem_config = mem_config; + else + rt_buf->mem_config = NULL; +} diff --git a/arch/x86/cpu/ivybridge/ivybridge.c b/arch/x86/cpu/ivybridge/ivybridge.c new file mode 100644 index 0000000..afe7e57 --- /dev/null +++ b/arch/x86/cpu/ivybridge/ivybridge.c @@ -0,0 +1,22 @@ +/* + * Copyright (C) 2015, Bin Meng + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include + +int arch_cpu_init(void) +{ + int ret; + + post_code(POST_CPU_INIT); + + ret = x86_cpu_init_f(); + if (ret) + return ret; + + return 0; +} diff --git a/arch/x86/include/asm/arch-ivybridge/fsp/fsp_configs.h b/arch/x86/include/asm/arch-ivybridge/fsp/fsp_configs.h new file mode 100644 index 0000000..24e2f2f --- /dev/null +++ b/arch/x86/include/asm/arch-ivybridge/fsp/fsp_configs.h @@ -0,0 +1,40 @@ +/* + * Copyright (C) 2015, Bin Meng + * + * SPDX-License-Identifier: Intel + */ + +#ifndef __FSP_CONFIGS_H__ +#define __FSP_CONFIGS_H__ + +struct platform_config { + u8 enable_ht; + u8 enable_turbo; + u8 enable_memory_down; + u8 enable_fast_boot; +}; + +/* + * Dummy structure for now as currently only SPD is verified in U-Boot. + * + * We can add the missing parameters when adding support on a board with + * memory down configuration. + */ +struct memory_config { + u8 dummy; +}; + +struct fsp_config_data { + struct fsp_cfg_common common; + struct platform_config plat_config; + struct memory_config mem_config; +}; + +struct fspinit_rtbuf { + u32 stack_top; + u32 boot_mode; + struct platform_config *plat_config; + struct memory_config *mem_config; +}; + +#endif /* __FSP_CONFIGS_H__ */ diff --git a/arch/x86/include/asm/arch-ivybridge/fsp/fsp_vpd.h b/arch/x86/include/asm/arch-ivybridge/fsp/fsp_vpd.h new file mode 100644 index 0000000..be9f055 --- /dev/null +++ b/arch/x86/include/asm/arch-ivybridge/fsp/fsp_vpd.h @@ -0,0 +1,12 @@ +/* + * Copyright (C) 2015, Bin Meng + * + * SPDX-License-Identifier: Intel + */ + +#ifndef __FSP_VPD_H__ +#define __FSP_VPD_H__ + +/* IvyBridge FSP does not support VPD/UPD */ + +#endif