From patchwork Fri Nov 13 14:59:21 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Valentin Longchamp X-Patchwork-Id: 544332 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 06DFD141405 for ; Sat, 14 Nov 2015 02:01:15 +1100 (AEDT) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 78C3A4BC3E; Fri, 13 Nov 2015 16:00:33 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 4J4Pd-s9JAIO; Fri, 13 Nov 2015 16:00:33 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 5F4584BC6C; Fri, 13 Nov 2015 15:59:58 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 007C44BC0C for ; Fri, 13 Nov 2015 15:59:39 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id rsnj63yQIQDG for ; Fri, 13 Nov 2015 15:59:38 +0100 (CET) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail-de.keymile.com (mail-de.keymile.com [195.8.104.250]) by theia.denx.de (Postfix) with ESMTPS id D14264BC1D for ; Fri, 13 Nov 2015 15:59:38 +0100 (CET) From: Valentin Longchamp To: Tom Rini , u-boot@lists.denx.de Date: Fri, 13 Nov 2015 15:59:21 +0100 Message-Id: <1447426768-23226-11-git-send-email-valentin.longchamp@keymile.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1447426768-23226-1-git-send-email-valentin.longchamp@keymile.com> References: <1447426768-23226-1-git-send-email-valentin.longchamp@keymile.com> Received: from mailrelay by mail-de.keymile.com Cc: Valentin Longchamp , Holger Brunck Subject: [U-Boot] [PATCH 10/17] powerpc/km8321: set the DDRCDR impedance settings back to half strength X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.15 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" The impedance settings have been changed with commit 2ea8ae99595ca11dd228726e854ebc6268208601 (whose goal was to set the internal voltage level to the DDR2 value - and not DDR1). There was no other good reason to set them to nominal strength than "the others do it like that" according to Ludger. The others however very often use DIMM modules where the nominal strength makes sense. In our case where the DRAM chips are soldered on board and the routing for these signals under control, half-strength is sufficient as a few measurements done in the lasts have shown. Since all the hardware qualification tests have been performed with half strength, the nominal strength settings are removed in favor of the default reset half strength settings. Signed-off-by: Valentin Longchamp Reviewed-by: Heiko Schocher --- include/configs/km/km8321-common.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/include/configs/km/km8321-common.h b/include/configs/km/km8321-common.h index 6f21c05..b2e68e3 100644 --- a/include/configs/km/km8321-common.h +++ b/include/configs/km/km8321-common.h @@ -67,8 +67,8 @@ #define CONFIG_SYS_DDRCDR (\ DDRCDR_EN | \ - DDRCDR_PZ_NOMZ | \ - DDRCDR_NZ_NOMZ | \ + DDRCDR_PZ_MAXZ | \ + DDRCDR_NZ_MAXZ | \ DDRCDR_M_ODR) #define CONFIG_SYS_DDR_CS0_BNDS 0x0000007f