From patchwork Fri Nov 6 10:04:54 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bin Meng X-Patchwork-Id: 540907 X-Patchwork-Delegate: bmeng.cn@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 0BB42140778 for ; Fri, 6 Nov 2015 21:03:57 +1100 (AEDT) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b=RvttsmSu; dkim-atps=neutral Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 40C954BDDE; Fri, 6 Nov 2015 11:03:02 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id xj-jcBfbSYCK; Fri, 6 Nov 2015 11:03:02 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id D19C84BD7C; Fri, 6 Nov 2015 11:02:36 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 2DC714BDB5 for ; Fri, 6 Nov 2015 11:02:27 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 87AoebIE3fEU for ; Fri, 6 Nov 2015 11:02:27 +0100 (CET) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail-pa0-f54.google.com (mail-pa0-f54.google.com [209.85.220.54]) by theia.denx.de (Postfix) with ESMTPS id 170A54BD89 for ; Fri, 6 Nov 2015 11:02:20 +0100 (CET) Received: by pacdm15 with SMTP id dm15so94362889pac.3 for ; Fri, 06 Nov 2015 02:02:19 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:subject:date:message-id:in-reply-to:references; bh=3IiDNR/9uA4iwH1Ijr5ijYM6VDa1Z08DnkRrLCvsHkI=; b=RvttsmSuCJQyUqTUvkmTeIa9icCkusf3ylP+qiLjboLB8UROMcdSYyf1fMfEUbNL1i 3FbYnAD94rcPxsMQ0uiBpamerwf8VNwb8KOMlglA3lJTj5ZXnoLyi559ZF8MwtfNGORQ CWUNvQiyXvI3vmRg/chsTrcJuj/++5ohkcNdIvVGwMLtamjthw/o2yEA5DNcaabvvQgE 640BWstTKhdqX4h5kY1WQgvDYUB5PiHG1Jqx4TGpbRIfnugApY2nXNLXvCllSqHTp0bI XHnVsvfxb8NkmiLu59dMJLXKUwrNIeIL3BherhTwNKGklKTPe+HAndsapGQ9epGFSl4+ Xz/Q== X-Received: by 10.66.251.193 with SMTP id zm1mr9134144pac.154.1446804139350; Fri, 06 Nov 2015 02:02:19 -0800 (PST) Received: from ala-d2121-lx1.wrs.com (unknown-157-139.windriver.com. [147.11.157.139]) by smtp.gmail.com with ESMTPSA id rm10sm12959710pbc.96.2015.11.06.02.02.18 (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Fri, 06 Nov 2015 02:02:18 -0800 (PST) From: Bin Meng To: Simon Glass , U-Boot Mailing List Date: Fri, 6 Nov 2015 02:04:54 -0800 Message-Id: <1446804295-6465-7-git-send-email-bmeng.cn@gmail.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1446804295-6465-1-git-send-email-bmeng.cn@gmail.com> References: <1446804295-6465-1-git-send-email-bmeng.cn@gmail.com> Subject: [U-Boot] [PATCH v2 7/8] x86: Remove legacy pci codes X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.15 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Now that we have converted all x86 boards to use driver model pci, remove these legacy pci codes. Signed-off-by: Bin Meng Acked-by: Simon Glass --- Changes in v2: None arch/x86/cpu/pci.c | 45 ------------------------------------------- arch/x86/include/asm/pci.h | 21 -------------------- arch/x86/lib/fsp/fsp_common.c | 5 ----- 3 files changed, 71 deletions(-) diff --git a/arch/x86/cpu/pci.c b/arch/x86/cpu/pci.c index d2ec45a..7a31260 100644 --- a/arch/x86/cpu/pci.c +++ b/arch/x86/cpu/pci.c @@ -19,51 +19,6 @@ DECLARE_GLOBAL_DATA_PTR; -static struct pci_controller x86_hose; - -int pci_early_init_hose(struct pci_controller **hosep) -{ - struct pci_controller *hose; - - hose = calloc(1, sizeof(struct pci_controller)); - if (!hose) - return -ENOMEM; - - board_pci_setup_hose(hose); - pci_setup_type1(hose); - hose->last_busno = pci_hose_scan(hose); - gd->hose = hose; - *hosep = hose; - - return 0; -} - -__weak int board_pci_pre_scan(struct pci_controller *hose) -{ - return 0; -} - -__weak int board_pci_post_scan(struct pci_controller *hose) -{ - return 0; -} - -void pci_init_board(void) -{ - struct pci_controller *hose = &x86_hose; - - /* Stop using the early hose */ - gd->hose = NULL; - - board_pci_setup_hose(hose); - pci_setup_type1(hose); - pci_register_hose(hose); - - board_pci_pre_scan(hose); - hose->last_busno = pci_hose_scan(hose); - board_pci_post_scan(hose); -} - static struct pci_controller *get_hose(void) { if (gd->hose) diff --git a/arch/x86/include/asm/pci.h b/arch/x86/include/asm/pci.h index f7e968e..a2945f1 100644 --- a/arch/x86/include/asm/pci.h +++ b/arch/x86/include/asm/pci.h @@ -25,27 +25,6 @@ struct pci_controller; void pci_setup_type1(struct pci_controller *hose); -/** - * board_pci_setup_hose() - Set up the PCI hose - * - * This is called by the common x86 PCI code to set up the PCI controller - * hose. It may be called when no memory/BSS is available so should just - * store things in 'hose' and not in BSS variables. - */ -void board_pci_setup_hose(struct pci_controller *hose); - -/** - * pci_early_init_hose() - Set up PCI host before relocation - * - * This allocates memory for, sets up and returns the PCI hose. It can be - * called before relocation. The hose will be stored in gd->hose for - * later use, but will become invalid one DRAM is available. - */ -int pci_early_init_hose(struct pci_controller **hosep); - -int board_pci_pre_scan(struct pci_controller *hose); -int board_pci_post_scan(struct pci_controller *hose); - /* * Simple PCI access routines - these work from either the early PCI hose * or the 'real' one, created after U-Boot has memory available diff --git a/arch/x86/lib/fsp/fsp_common.c b/arch/x86/lib/fsp/fsp_common.c index c78df94..5276ce6 100644 --- a/arch/x86/lib/fsp/fsp_common.c +++ b/arch/x86/lib/fsp/fsp_common.c @@ -35,11 +35,6 @@ int fsp_init_phase_pci(void) return status ? -EPERM : 0; } -int board_pci_post_scan(struct pci_controller *hose) -{ - return fsp_init_phase_pci(); -} - void board_final_cleanup(void) { u32 status;