diff --git a/drivers/mtd/spi/sf_ops.c b/drivers/mtd/spi/sf_ops.c
index af94c0b..97e644d 100644
--- a/drivers/mtd/spi/sf_ops.c
+++ b/drivers/mtd/spi/sf_ops.c
@@ -39,7 +39,7 @@ static u8 spi_read_cmds_array[] = {
 	CMD_READ_QUAD_IO_FAST,
 };
 
-static int spi_flash_cmd_read_status(struct spi_flash *flash, u8 *rs)
+static int read_sr(struct spi_flash *flash, u8 *rs)
 {
 	int ret;
 	u8 cmd;
@@ -68,7 +68,7 @@ static int read_fsr(struct spi_flash *flash, u8 *fsr)
 	return 0;
 }
 
-static int spi_flash_cmd_write_status(struct spi_flash *flash, u8 ws)
+static int write_sr(struct spi_flash *flash, u8 ws)
 {
 	u8 cmd;
 	int ret;
@@ -84,7 +84,7 @@ static int spi_flash_cmd_write_status(struct spi_flash *flash, u8 ws)
 }
 
 #if defined(CONFIG_SPI_FLASH_SPANSION) || defined(CONFIG_SPI_FLASH_WINBOND)
-static int spi_flash_cmd_read_config(struct spi_flash *flash, u8 *rc)
+static int read_cr(struct spi_flash *flash, u8 *rc)
 {
 	int ret;
 	u8 cmd;
@@ -99,13 +99,13 @@ static int spi_flash_cmd_read_config(struct spi_flash *flash, u8 *rc)
 	return 0;
 }
 
-static int spi_flash_cmd_write_config(struct spi_flash *flash, u8 wc)
+static int write_cr(struct spi_flash *flash, u8 wc)
 {
 	u8 data[2];
 	u8 cmd;
 	int ret;
 
-	ret = spi_flash_cmd_read_status(flash, &data[0]);
+	ret = read_sr(flash, &data[0]);
 	if (ret < 0)
 		return ret;
 
@@ -122,7 +122,7 @@ static int spi_flash_cmd_write_config(struct spi_flash *flash, u8 wc)
 #endif
 
 #ifdef CONFIG_SPI_FLASH_BAR
-static int spi_flash_write_bank(struct spi_flash *flash, u32 offset)
+static int spi_flash_write_bar(struct spi_flash *flash, u32 offset)
 {
 	u8 cmd, bank_sel;
 	int ret;
@@ -143,7 +143,7 @@ bar_end:
 	return flash->bank_curr;
 }
 
-static int spi_flash_read_bank(struct spi_flash *flash, u8 idcode0)
+static int spi_flash_read_bar(struct spi_flash *flash, u8 idcode0)
 {
 	u8 curr_bank = 0;
 	int ret;
@@ -174,7 +174,7 @@ bank_end:
 #endif
 
 #ifdef CONFIG_SF_DUAL_FLASH
-static void spi_flash_dual_flash(struct spi_flash *flash, u32 *addr)
+static void spi_flash_dual(struct spi_flash *flash, u32 *addr)
 {
 	switch (flash->dual_flash) {
 	case SF_DUAL_STACKED_FLASH:
@@ -200,7 +200,7 @@ static int spi_flash_sr_ready(struct spi_flash *flash)
 	u8 sr;
 	int ret;
 
-	ret = spi_flash_cmd_read_status(flash, &sr);
+	ret = read_sr(flash, &sr);
 	if (ret < 0)
 		return ret;
 
@@ -316,10 +316,10 @@ int spi_flash_cmd_erase_ops(struct spi_flash *flash, u32 offset, size_t len)
 
 #ifdef CONFIG_SF_DUAL_FLASH
 		if (flash->dual_flash > SF_SINGLE_FLASH)
-			spi_flash_dual_flash(flash, &erase_addr);
+			spi_flash_dual(flash, &erase_addr);
 #endif
 #ifdef CONFIG_SPI_FLASH_BAR
-		ret = spi_flash_write_bank(flash, erase_addr);
+		ret = spi_flash_write_bar(flash, erase_addr);
 		if (ret < 0)
 			return ret;
 #endif
@@ -358,10 +358,10 @@ int spi_flash_cmd_write_ops(struct spi_flash *flash, u32 offset,
 
 #ifdef CONFIG_SF_DUAL_FLASH
 		if (flash->dual_flash > SF_SINGLE_FLASH)
-			spi_flash_dual_flash(flash, &write_addr);
+			spi_flash_dual(flash, &write_addr);
 #endif
 #ifdef CONFIG_SPI_FLASH_BAR
-		ret = spi_flash_write_bank(flash, write_addr);
+		ret = spi_flash_write_bar(flash, write_addr);
 		if (ret < 0)
 			return ret;
 #endif
@@ -453,10 +453,10 @@ int spi_flash_cmd_read_ops(struct spi_flash *flash, u32 offset,
 
 #ifdef CONFIG_SF_DUAL_FLASH
 		if (flash->dual_flash > SF_SINGLE_FLASH)
-			spi_flash_dual_flash(flash, &read_addr);
+			spi_flash_dual(flash, &read_addr);
 #endif
 #ifdef CONFIG_SPI_FLASH_BAR
-		ret = spi_flash_write_bank(flash, read_addr);
+		ret = spi_flash_write_bar(flash, read_addr);
 		if (ret < 0)
 			return ret;
 		bank_sel = flash->bank_curr;
@@ -615,14 +615,14 @@ static int spi_flash_set_qeb_mxic(struct spi_flash *flash)
 	u8 qeb_status;
 	int ret;
 
-	ret = spi_flash_cmd_read_status(flash, &qeb_status);
+	ret = read_sr(flash, &qeb_status);
 	if (ret < 0)
 		return ret;
 
 	if (qeb_status & STATUS_QEB_MXIC) {
 		debug("SF: mxic: QEB is already set\n");
 	} else {
-		ret = spi_flash_cmd_write_status(flash, STATUS_QEB_MXIC);
+		ret = write_sr(flash, STATUS_QEB_MXIC);
 		if (ret < 0)
 			return ret;
 	}
@@ -637,14 +637,14 @@ static int spi_flash_set_qeb_winspan(struct spi_flash *flash)
 	u8 qeb_status;
 	int ret;
 
-	ret = spi_flash_cmd_read_config(flash, &qeb_status);
+	ret = read_cr(flash, &qeb_status);
 	if (ret < 0)
 		return ret;
 
 	if (qeb_status & STATUS_QEB_WINSPAN) {
 		debug("SF: winspan: QEB is already set\n");
 	} else {
-		ret = spi_flash_cmd_write_config(flash, STATUS_QEB_WINSPAN);
+		ret = write_cr(flash, STATUS_QEB_WINSPAN);
 		if (ret < 0)
 			return ret;
 	}
@@ -751,7 +751,7 @@ int spi_flash_scan(struct spi_slave *spi, struct spi_flash *flash)
 #if defined(CONFIG_SPI_FLASH_ATMEL) || \
 	defined(CONFIG_SPI_FLASH_MACRONIX) || \
 	defined(CONFIG_SPI_FLASH_SST)
-		spi_flash_cmd_write_status(flash, 0);
+		write_sr(flash, 0);
 #endif
 
 	/* Assign spi data */
@@ -871,7 +871,7 @@ int spi_flash_scan(struct spi_slave *spi, struct spi_flash *flash)
 
 	/* Configure the BAR - discover bank cmds and read current bank */
 #ifdef CONFIG_SPI_FLASH_BAR
-	ret = spi_flash_read_bank(flash, idcode[0]);
+	ret = spi_flash_read_bar(flash, idcode[0]);
 	if (ret < 0)
 		return ret;
 #endif
