From patchwork Tue Oct 20 12:46:33 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: George McCollister X-Patchwork-Id: 532949 X-Patchwork-Delegate: sjg@chromium.org Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id CFDEE140281 for ; Tue, 20 Oct 2015 23:47:12 +1100 (AEDT) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b=itgoPdTy; dkim-atps=neutral Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 6E7134B635; Tue, 20 Oct 2015 14:47:08 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id wEoXSAAj6P4K; Tue, 20 Oct 2015 14:47:08 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id B293D4B62A; Tue, 20 Oct 2015 14:47:07 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id A83234B62A for ; Tue, 20 Oct 2015 14:47:04 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 6UCxjS2upRdD for ; Tue, 20 Oct 2015 14:47:04 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail-ig0-f176.google.com (mail-ig0-f176.google.com [209.85.213.176]) by theia.denx.de (Postfix) with ESMTPS id 3804F4B624 for ; Tue, 20 Oct 2015 14:47:00 +0200 (CEST) Received: by igbhv6 with SMTP id hv6so13264551igb.0 for ; Tue, 20 Oct 2015 05:46:59 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id; bh=xxBVc23exWGZBI+Lv9YLuv/0xChjiiyQ0QtEwbEqEHA=; b=itgoPdTyaomv+2uwWEGmQ1VhfBY5RW7dxKCk8MM8EpsF9FPXln4R6HpmIiT2x7SDgf niGPC0gBV/gevt/HtKsE4HtlQGXf7Px0361XGnu0LVbdnpF2pzmFY4kflPg85uXYJTlz g+pmT9m03SrhOyz+f8kfOwNjoTBppvJSbyZwkGpIuWPPXV7lyyRpuzTrCtLDhE7WHVlW OfZ0N5zdLDRitanaL0lVkZoYcso0HEQMr5rIbf0zNT0Qo4iwnldFfB2widTEScpEsBT+ 3tqvvcR+tmwiU2h5XM8Pt/yb1ZkhTaZI6Rbwa0oMzxaRoFQTRN/AMyTue69vcgpM3JqF /HZA== X-Received: by 10.50.112.196 with SMTP id is4mr23317174igb.45.1445345219361; Tue, 20 Oct 2015 05:46:59 -0700 (PDT) Received: from localhost.localdomain (mail.novatech-llc.com. [64.126.95.172]) by smtp.gmail.com with ESMTPSA id b16sm1354013iob.39.2015.10.20.05.46.58 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 20 Oct 2015 05:46:58 -0700 (PDT) From: George McCollister To: u-boot@lists.denx.de Date: Tue, 20 Oct 2015 07:46:33 -0500 Message-Id: <1445345193-16389-1-git-send-email-george.mccollister@gmail.com> X-Mailer: git-send-email 2.5.0 Subject: [U-Boot] [PATCH v4] x86: Added support for Advantech SOM-6896 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.15 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Advantech SOM-6896 is a Broadwell U based COM Express Compact Module Type 6. This patch adds support for it as a coreboot payload. On board SATA and SPI are functional. On board Ethernet isn't functional but since it's optional and ties up a PCIe x4 that is otherwise brought out, this isn't a concern at the moment. USB doesn't work since the xHCI driver appears to be broken. Signed-off-by: George McCollister Reviewed-by: Bin Meng Acked-by: Simon Glass --- Changes for V2: Changed pci's compatible string to "pci-x86" Changed I/O from base of 0x1000 to base of 0x1900 Changed spi-flash memory-map Changes for V3: Renamed som-6896.dts to broadwell_som-6896.dts Changes for V4: Changed PCI I/O start from 0x1900 to 0x2000 (actually did it this time) Removed whitespace before my name at the top of som-6896.h arch/x86/dts/Makefile | 3 ++- arch/x86/dts/broadwell_som-6896.dts | 43 +++++++++++++++++++++++++++++++++++++ include/configs/som-6896.h | 38 ++++++++++++++++++++++++++++++++ 3 files changed, 83 insertions(+), 1 deletion(-) create mode 100644 arch/x86/dts/broadwell_som-6896.dts create mode 100644 include/configs/som-6896.h diff --git a/arch/x86/dts/Makefile b/arch/x86/dts/Makefile index 71595c7..83a2b8c 100644 --- a/arch/x86/dts/Makefile +++ b/arch/x86/dts/Makefile @@ -6,7 +6,8 @@ dtb-y += bayleybay.dtb \ galileo.dtb \ minnowmax.dtb \ qemu-x86_i440fx.dtb \ - qemu-x86_q35.dtb + qemu-x86_q35.dtb \ + broadwell_som-6896.dtb targets += $(dtb-y) diff --git a/arch/x86/dts/broadwell_som-6896.dts b/arch/x86/dts/broadwell_som-6896.dts new file mode 100644 index 0000000..a6b5d0f --- /dev/null +++ b/arch/x86/dts/broadwell_som-6896.dts @@ -0,0 +1,43 @@ +/dts-v1/; + +/include/ "skeleton.dtsi" +/include/ "serial.dtsi" +/include/ "rtc.dtsi" + +/ { + model = "Advantech SOM-6896"; + compatible = "advantech,som-6896", "intel,broadwell"; + + aliases { + spi0 = "/spi"; + }; + + config { + silent_console = <0>; + }; + + chosen { + stdout-path = "/serial"; + }; + + pci { + compatible = "pci-x86"; + #address-cells = <3>; + #size-cells = <2>; + u-boot,dm-pre-reloc; + ranges = <0x02000000 0x0 0xe0000000 0xe0000000 0 0x10000000 + 0x42000000 0x0 0xd0000000 0xd0000000 0 0x10000000 + 0x01000000 0x0 0x2000 0x2000 0 0xe000>; + }; + + spi { + #address-cells = <1>; + #size-cells = <0>; + compatible = "intel,ich-spi"; + spi-flash@0 { + reg = <0>; + compatible = "winbond,w25q128", "spi-flash"; + memory-map = <0xff000000 0x01000000>; + }; + }; +}; diff --git a/include/configs/som-6896.h b/include/configs/som-6896.h new file mode 100644 index 0000000..300e9df --- /dev/null +++ b/include/configs/som-6896.h @@ -0,0 +1,38 @@ +/* + * Configuration settings for the SOM-6896 + * + * Copyright (C) 2015 NovaTech LLC + * George McCollister + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +#include + +#define CONFIG_SYS_MONITOR_LEN (1 << 20) + +#define CONFIG_BOARD_EARLY_INIT_F +#define CONFIG_MISC_INIT_R + +#define CONFIG_SCSI_DEV_LIST \ + {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_WILDCATPOINT_AHCI} + +#define CONFIG_SYS_EARLY_PCI_INIT +#define CONFIG_PCI_PNP + +#define VIDEO_IO_OFFSET 0 +#define CONFIG_X86EMU_RAW_IO + +#define CONFIG_ARCH_EARLY_INIT_R + +#define CONFIG_STD_DEVICES_SETTINGS "stdin=serial,vga,usbkbd\0" \ + "stdout=serial,vga\0" \ + "stderr=serial,vga\0" + +#define CONFIG_ENV_SECT_SIZE 0x1000 +#define CONFIG_ENV_OFFSET 0x00ff0000 + +#endif /* __CONFIG_H */