From patchwork Thu Sep 10 06:20:24 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bin Meng X-Patchwork-Id: 516133 X-Patchwork-Delegate: sjg@chromium.org Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id B558C140271 for ; Thu, 10 Sep 2015 16:18:37 +1000 (AEST) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b=Dln4UN1p; dkim-atps=neutral Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 64E234B76A; Thu, 10 Sep 2015 08:18:34 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id aFg_AM4Tg7Sb; Thu, 10 Sep 2015 08:18:34 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 897654B6CE; Thu, 10 Sep 2015 08:18:27 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 74D224B6CB for ; Thu, 10 Sep 2015 08:18:15 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id MSHrDu2kY3FN for ; Thu, 10 Sep 2015 08:18:15 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail-pa0-f44.google.com (mail-pa0-f44.google.com [209.85.220.44]) by theia.denx.de (Postfix) with ESMTPS id 0D1864B6C6 for ; Thu, 10 Sep 2015 08:18:11 +0200 (CEST) Received: by padhy16 with SMTP id hy16so33401173pad.1 for ; Wed, 09 Sep 2015 23:18:10 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=BKzBnfZ4e8PSV1oD40btI1K7SKX693MGl988xWOWC84=; b=Dln4UN1ppUWeIu59M6UC7Ng/k5taevRpnvc8TGu7Gyn9EkiH/I6tzqAK75lc3ix5Z1 eMCXNKnlsPN6FQ3QPkLFhKqrWuFg0OVwqD8xXhMn2zCIMUQ1LBqYi5E1dzBVMZwM+6L+ job0mfz9C1oSUdWSIYE3Xy+vmeDLeq2Qkd0TuxWrjfWIFk6KqyUJQ71mIWqL9Pga6i1m YW5fyAFZjPWf2icWnKFmk+eZmnfxCCilW/gbkazqZl/oCLRJ3kYz27UbiUQhIt/8bxp6 DgBNddan1zs/C7pQGPLLNCYM5fjhc5oPEv5kvnDHpZGhWdqp2NJB5wD2rHD6QvsC39i6 faIw== X-Received: by 10.68.104.98 with SMTP id gd2mr80487976pbb.130.1441865890389; Wed, 09 Sep 2015 23:18:10 -0700 (PDT) Received: from ala-d2121-lx1.wrs.com (unknown-157-139.windriver.com. [147.11.157.139]) by smtp.gmail.com with ESMTPSA id x6sm9681626pbt.3.2015.09.09.23.18.09 (version=TLS1_1 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 09 Sep 2015 23:18:09 -0700 (PDT) From: Bin Meng To: Simon Glass , U-Boot Mailing List Date: Wed, 9 Sep 2015 23:20:24 -0700 Message-Id: <1441866030-17231-3-git-send-email-bmeng.cn@gmail.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1441866030-17231-1-git-send-email-bmeng.cn@gmail.com> References: <1441866030-17231-1-git-send-email-bmeng.cn@gmail.com> Subject: [U-Boot] [PATCH v2 2/8] x86: quark: Add clrbits, setbits, clrsetbits macros for message port access X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.15 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" On Intel Quark, lots of registers on the message port need be programmed. Add handy clrbits, setbits, clrsetbits macros for message port access. Signed-off-by: Bin Meng Reviewed-by: Simon Glass --- Changes in v2: - Change all macros to use a single msg_port_generic_clrsetbits arch/x86/include/asm/arch-quark/msg_port.h | 31 ++++++++++++++++++++++++++++++ 1 file changed, 31 insertions(+) diff --git a/arch/x86/include/asm/arch-quark/msg_port.h b/arch/x86/include/asm/arch-quark/msg_port.h index 2e78a66..313e23f 100644 --- a/arch/x86/include/asm/arch-quark/msg_port.h +++ b/arch/x86/include/asm/arch-quark/msg_port.h @@ -101,6 +101,37 @@ u32 msg_port_io_read(u8 port, u32 reg); */ void msg_port_io_write(u8 port, u32 reg, u32 value); +/* clrbits, setbits, clrsetbits macros for message port access */ + +#define msg_port_normal_read msg_port_read +#define msg_port_normal_write msg_port_write + +#define msg_port_generic_clrsetbits(type, port, reg, clr, set) \ + msg_port_##type##_write(port, reg, \ + (msg_port_##type##_read(port, reg) \ + & ~(clr)) | (set)) + +#define msg_port_clrbits(port, reg, clr) \ + msg_port_generic_clrsetbits(normal, port, reg, clr, 0) +#define msg_port_setbits(port, reg, set) \ + msg_port_generic_clrsetbits(normal, port, reg, 0, set) +#define msg_port_clrsetbits(port, reg, clr, set) \ + msg_port_generic_clrsetbits(normal, port, reg, clr, set) + +#define msg_port_alt_clrbits(port, reg, clr) \ + msg_port_generic_clrsetbits(alt, port, reg, clr, 0) +#define msg_port_alt_setbits(port, reg, set) \ + msg_port_generic_clrsetbits(alt, port, reg, 0, set) +#define msg_port_alt_clrsetbits(port, reg, clr, set) \ + msg_port_generic_clrsetbits(alt, port, reg, clr, set) + +#define msg_port_io_clrbits(port, reg, clr) \ + msg_port_generic_clrsetbits(io, port, reg, clr, 0) +#define msg_port_io_setbits(port, reg, set) \ + msg_port_generic_clrsetbits(io, port, reg, 0, set) +#define msg_port_io_clrsetbits(port, reg, clr, set) \ + msg_port_generic_clrsetbits(io, port, reg, clr, set) + #endif /* __ASSEMBLY__ */ #endif /* _QUARK_MSG_PORT_H_ */