From patchwork Wed Sep 9 05:09:51 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Chou X-Patchwork-Id: 515700 X-Patchwork-Delegate: thomas@wytron.com.tw Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 7AD92140325 for ; Wed, 9 Sep 2015 15:10:23 +1000 (AEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 347064B7BA; Wed, 9 Sep 2015 07:10:20 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id zzf9dxDWtc-R; Wed, 9 Sep 2015 07:10:19 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 470824B79B; Wed, 9 Sep 2015 07:10:19 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 20BBA4B79B for ; Wed, 9 Sep 2015 07:10:15 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id j_7uFapX_65r for ; Wed, 9 Sep 2015 07:10:15 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from www.wytron.com.tw (220-134-43-68.HINET-IP.hinet.net [220.134.43.68]) by theia.denx.de (Postfix) with ESMTP id 96CDF4B796 for ; Wed, 9 Sep 2015 07:10:10 +0200 (CEST) Received: from localhost.localdomain (unknown [192.168.1.250]) by www.wytron.com.tw (Postfix) with ESMTP id 5D903D00351; Wed, 9 Sep 2015 13:10:07 +0800 (CST) From: Thomas Chou To: u-boot@lists.denx.de Date: Wed, 9 Sep 2015 13:09:51 +0800 Message-Id: <1441775391-12716-1-git-send-email-thomas@wytron.com.tw> X-Mailer: git-send-email 2.1.4 Cc: Marek Vasut , clsee@altera.com, lftan@altera.com Subject: [U-Boot] [PATCH] nios2: zap dly_clks X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.15 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" The dly_clks() in start.S is no use after switching to generic timer. Remove it. Signed-off-by: Thomas Chou Acked-by: Marek Vasut --- arch/nios2/cpu/start.S | 33 --------------------------------- 1 file changed, 33 deletions(-) diff --git a/arch/nios2/cpu/start.S b/arch/nios2/cpu/start.S index f80b4f3..e92f06e 100644 --- a/arch/nios2/cpu/start.S +++ b/arch/nios2/cpu/start.S @@ -175,39 +175,6 @@ relocate_code: callr r8 ret -/* - * dly_clks -- Nios2 (like Nios1) doesn't have a timebase in - * the core. For simple delay loops, we do our best by counting - * instruction cycles. - * - * Instruction performance varies based on the core. For cores - * with icache and static/dynamic branch prediction (II/f, II/s): - * - * Normal ALU (e.g. add, cmp, etc): 1 cycle - * Branch (correctly predicted, taken): 2 cycles - * Negative offset is predicted (II/s). - * - * For cores without icache and no branch prediction (II/e): - * - * Normal ALU (e.g. add, cmp, etc): 6 cycles - * Branch (no prediction): 6 cycles - * - * For simplicity, if an instruction cache is implemented we - * assume II/f or II/s. Otherwise, we use the II/e. - * - */ - .globl dly_clks - -dly_clks: - -#if (CONFIG_SYS_ICACHE_SIZE > 0) - subi r4, r4, 3 /* 3 clocks/loop */ -#else - subi r4, r4, 12 /* 12 clocks/loop */ -#endif - bge r4, r0, dly_clks - ret - .data .globl version_string