| Message ID | 1441087907-25993-8-git-send-email-jteki@openedev.com |
|---|---|
| State | Superseded |
| Delegated to: | Jagannadha Sutradharudu Teki |
| Headers | show |
On 09/01/2015 08:11 AM, Jagan Teki wrote: > Enabled zynq qspi controller node for zc770-xm010 board. > > => sf probe 0 -- bus0 for selecting spi controller > => sf probe 1 -- bus1 for selecting qspi controller > > Signed-off-by: Jagan Teki <jteki@openedev.com> > Cc: Simon Glass <sjg@chromium.org> > Cc: Michal Simek <michal.simek@xilinx.com> > Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com> > --- > arch/arm/dts/zynq-zc770-xm010.dts | 5 +++++ > 1 file changed, 5 insertions(+) > > diff --git a/arch/arm/dts/zynq-zc770-xm010.dts b/arch/arm/dts/zynq-zc770-xm010.dts > index 680f24c..eec4c96 100644 > --- a/arch/arm/dts/zynq-zc770-xm010.dts > +++ b/arch/arm/dts/zynq-zc770-xm010.dts > @@ -17,6 +17,7 @@ > i2c0 = &i2c0; > serial0 = &uart1; > spi0 = &spi1; > + spi1 = &qspi; We have discussed this internally 2 weeks ago and I would prefer to have spi0 = &gspi; because then we can better handle internal commands where qspi is expected on bus 0. Can you please switch it? Thanks, Michal
On 1 September 2015 at 13:52, Michal Simek <michal.simek@xilinx.com> wrote: > On 09/01/2015 08:11 AM, Jagan Teki wrote: >> Enabled zynq qspi controller node for zc770-xm010 board. >> >> => sf probe 0 -- bus0 for selecting spi controller >> => sf probe 1 -- bus1 for selecting qspi controller >> >> Signed-off-by: Jagan Teki <jteki@openedev.com> >> Cc: Simon Glass <sjg@chromium.org> >> Cc: Michal Simek <michal.simek@xilinx.com> >> Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com> >> --- >> arch/arm/dts/zynq-zc770-xm010.dts | 5 +++++ >> 1 file changed, 5 insertions(+) >> >> diff --git a/arch/arm/dts/zynq-zc770-xm010.dts b/arch/arm/dts/zynq-zc770-xm010.dts >> index 680f24c..eec4c96 100644 >> --- a/arch/arm/dts/zynq-zc770-xm010.dts >> +++ b/arch/arm/dts/zynq-zc770-xm010.dts >> @@ -17,6 +17,7 @@ >> i2c0 = &i2c0; >> serial0 = &uart1; >> spi0 = &spi1; >> + spi1 = &qspi; > > We have discussed this internally 2 weeks ago and I would prefer to have > spi0 = &gspi; because then we can better handle internal commands where It is &qspi right not &gqspi > qspi is expected on bus 0. > > Can you please switch it? OK, I will make spi0 as qspi and spi1 as spi1 is that fine? thanks!
On 09/01/2015 10:43 AM, Jagan Teki wrote: > On 1 September 2015 at 13:52, Michal Simek <michal.simek@xilinx.com> wrote: >> On 09/01/2015 08:11 AM, Jagan Teki wrote: >>> Enabled zynq qspi controller node for zc770-xm010 board. >>> >>> => sf probe 0 -- bus0 for selecting spi controller >>> => sf probe 1 -- bus1 for selecting qspi controller >>> >>> Signed-off-by: Jagan Teki <jteki@openedev.com> >>> Cc: Simon Glass <sjg@chromium.org> >>> Cc: Michal Simek <michal.simek@xilinx.com> >>> Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com> >>> --- >>> arch/arm/dts/zynq-zc770-xm010.dts | 5 +++++ >>> 1 file changed, 5 insertions(+) >>> >>> diff --git a/arch/arm/dts/zynq-zc770-xm010.dts b/arch/arm/dts/zynq-zc770-xm010.dts >>> index 680f24c..eec4c96 100644 >>> --- a/arch/arm/dts/zynq-zc770-xm010.dts >>> +++ b/arch/arm/dts/zynq-zc770-xm010.dts >>> @@ -17,6 +17,7 @@ >>> i2c0 = &i2c0; >>> serial0 = &uart1; >>> spi0 = &spi1; >>> + spi1 = &qspi; >> >> We have discussed this internally 2 weeks ago and I would prefer to have >> spi0 = &gspi; because then we can better handle internal commands where > > It is &qspi right not &gqspi it is zynq that's why qspi. Thanks, Michal
diff --git a/arch/arm/dts/zynq-zc770-xm010.dts b/arch/arm/dts/zynq-zc770-xm010.dts index 680f24c..eec4c96 100644 --- a/arch/arm/dts/zynq-zc770-xm010.dts +++ b/arch/arm/dts/zynq-zc770-xm010.dts @@ -17,6 +17,7 @@ i2c0 = &i2c0; serial0 = &uart1; spi0 = &spi1; + spi1 = &qspi; }; chosen { @@ -53,6 +54,10 @@ }; }; +&qspi { + status = "okay"; +}; + &can0 { status = "okay"; };
Enabled zynq qspi controller node for zc770-xm010 board. => sf probe 0 -- bus0 for selecting spi controller => sf probe 1 -- bus1 for selecting qspi controller Signed-off-by: Jagan Teki <jteki@openedev.com> Cc: Simon Glass <sjg@chromium.org> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com> --- arch/arm/dts/zynq-zc770-xm010.dts | 5 +++++ 1 file changed, 5 insertions(+)