From patchwork Thu Aug 13 16:51:21 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sergey Temerkhanov X-Patchwork-Id: 507088 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id C35A61401AF for ; Fri, 14 Aug 2015 02:46:03 +1000 (AEST) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b=PTRD+jG/; dkim-atps=neutral Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 80DA74B81A; Thu, 13 Aug 2015 18:46:01 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id P4U4q8zfoKNY; Thu, 13 Aug 2015 18:46:01 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id B62A14B7F7; Thu, 13 Aug 2015 18:46:00 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 08EAF4B7F7 for ; Thu, 13 Aug 2015 18:45:59 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id C9y00vi6Fdd3 for ; Thu, 13 Aug 2015 18:45:58 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail-lb0-f195.google.com (mail-lb0-f195.google.com [209.85.217.195]) by theia.denx.de (Postfix) with ESMTPS id B9F3B4B7D7 for ; Thu, 13 Aug 2015 18:45:55 +0200 (CEST) Received: by lbcue2 with SMTP id ue2so2658401lbc.0 for ; Thu, 13 Aug 2015 09:45:54 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=xo5AB7lp+qyD9cS3BGVvrlGizmTYYD7feWitUppyqnE=; b=PTRD+jG/Wj53nruwCB2mOyqxVx7qreafsb5gFwZQkuk/AbeKqNqrmr9GeB3blVRPrJ 60IR+6FvOwkbdY0S/8UF8JveNtYV60KbhcrMrCJ8OfvgDXhkMqY/CetGtJwfyoJYus++ W/FgCwzg2pxIOqxQNF4JvKE/lnqxZqve5wHeUWN629PYcqur+EcBCWTiX3whQxt4oJA2 e45h+nleodLETm4dkjc85hUZstGKUGHVIkiTEMJUYZB6XRJMZdFS8FdZy5Rh3VC99zCp crKIjKbSPgrdSTCx4Fj84039Ymnkx1ieYN2PlpjZe6w+/ilGRXBsavEqhT1559hVXpVu tb1Q== X-Received: by 10.112.46.130 with SMTP id v2mr37037290lbm.119.1439484354649; Thu, 13 Aug 2015 09:45:54 -0700 (PDT) Received: from snickers.office.auriga.msk ([81.19.133.99]) by smtp.gmail.com with ESMTPSA id lm3sm693749lac.18.2015.08.13.09.45.53 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 13 Aug 2015 09:45:54 -0700 (PDT) From: Sergey Temerkhanov To: u-boot@lists.denx.de Date: Thu, 13 Aug 2015 19:51:21 +0300 Message-Id: <1439484688-866-2-git-send-email-s.temerkhanov@gmail.com> X-Mailer: git-send-email 2.2.0 In-Reply-To: <1439484688-866-1-git-send-email-s.temerkhanov@gmail.com> References: <1439484688-866-1-git-send-email-s.temerkhanov@gmail.com> Cc: Tom Rini , Siva Durga Prasad Paladugu , Ian Campbell , Thierry Reding , Radha Mohan Chintakuntla , York Sun Subject: [U-Boot] [RESUBMIT PATCH v3 1/8] armv8: Add read_mpidr() function X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.15 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" This patch adds the read_mpidr() function which returns the MPIDR_EL1 register value Signed-off-by: Sergey Temerkhanov Reviewed-by: Simon Glass --- Changes in v3: None Changes in v2: None arch/arm/include/asm/system.h | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/arch/arm/include/asm/system.h b/arch/arm/include/asm/system.h index 868ea54..323c43e 100644 --- a/arch/arm/include/asm/system.h +++ b/arch/arm/include/asm/system.h @@ -71,6 +71,17 @@ static inline void set_sctlr(unsigned int val) asm volatile("isb"); } +static inline unsigned long read_mpidr(void) +{ + unsigned long val; + + asm volatile("mrs %0, mpidr_el1" : "=r" (val)); + + return val; +} + +#define BSP_COREID 0 + void __asm_flush_dcache_all(void); void __asm_invalidate_dcache_all(void); void __asm_flush_dcache_range(u64 start, u64 end);