From patchwork Tue Aug 4 21:04:41 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sylvain Lemieux X-Patchwork-Id: 503817 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 0A6CD140293 for ; Wed, 5 Aug 2015 07:05:54 +1000 (AEST) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b=qx7XTxmb; dkim-atps=neutral Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id DC9E3A75FE; Tue, 4 Aug 2015 23:05:30 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id YNo5e2_nFJXG; Tue, 4 Aug 2015 23:05:30 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 258DEA7621; Tue, 4 Aug 2015 23:05:25 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 56171A760C for ; Tue, 4 Aug 2015 23:05:19 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id I8xlPGQi1aEH for ; Tue, 4 Aug 2015 23:05:19 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail-io0-f180.google.com (mail-io0-f180.google.com [209.85.223.180]) by theia.denx.de (Postfix) with ESMTPS id 81F8BA7607 for ; Tue, 4 Aug 2015 23:05:07 +0200 (CEST) Received: by ioea135 with SMTP id a135so30086751ioe.1 for ; Tue, 04 Aug 2015 14:05:06 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id; bh=weG+m+dvkKQpPoynbXrG2JTtL+9xXvsEI+3Pk/SYDxw=; b=qx7XTxmb2ExsFx5P6aR9vANoGOTqBLp0TH2bgqjWOM7YEbvVTM6yhe+F9fTrf8nZiI 8KXHGTbYesubbqOMPSCrQ7DrFo/Wcypt9Iaa4jWNs6kj8QFAPT4XrRGnVeR4fhfwlr/r IBEM4ONtuoG+7Cq7zm7vu1KMrgY0x4srFwuXYaoBtVFbx7zbnGeM+UWggLcUkuKRacZU Ib/SDc5CGIqPNagiiyE6kkEQjQ8pb8NSL+EoZACSSxZerxK8pY1ld9jAgX5CpCvDFQmT sHFI7N9drB5/nM0rG3RUZrhwb8ry563D4zrl/FUR3Kr/1aF51G1Ye1s0XuP3qzmdxtg2 K7kw== X-Received: by 10.107.7.105 with SMTP id 102mr6279783ioh.81.1438722306554; Tue, 04 Aug 2015 14:05:06 -0700 (PDT) Received: from CABRO3AP00510.americas.tsp.ad ([74.51.240.241]) by smtp.gmail.com with ESMTPSA id c5sm682063igx.16.2015.08.04.14.05.04 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 04 Aug 2015 14:05:05 -0700 (PDT) From: slemieux.tyco@gmail.com To: u-boot@lists.denx.de Date: Tue, 4 Aug 2015 17:04:41 -0400 Message-Id: <1438722282-3736-5-git-send-email-slemieux.tyco@gmail.com> X-Mailer: git-send-email 1.8.3.1 Cc: scottwood@freescale.com, marex@denx.de, vz@mleia.com Subject: [U-Boot] [PATCH v4 4/5] i2c: lpc32xx: add support for OTG I2C X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.15 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" From: Sylvain Lemieux Updated the LPC32xx I2C driver to support the OTG I2C that is part of the USB module. Signed-off-by: Sylvain Lemieux Acked-by: Marek Vasut --- Changes from v3 to v4: * No changes. Changes from v2 to v3: * New patch added in v3. drivers/i2c/lpc32xx_i2c.c | 20 +++++++++++++++++--- 1 file changed, 17 insertions(+), 3 deletions(-) diff --git a/drivers/i2c/lpc32xx_i2c.c b/drivers/i2c/lpc32xx_i2c.c index 98106fa..be166b0 100644 --- a/drivers/i2c/lpc32xx_i2c.c +++ b/drivers/i2c/lpc32xx_i2c.c @@ -1,7 +1,7 @@ /* * LPC32xx I2C interface driver * - * (C) Copyright 2014 DENX Software Engineering GmbH + * (C) Copyright 2014-2015 DENX Software Engineering GmbH * Written-by: Albert ARIBAUD - 3ADEV * * SPDX-License-Identifier: GPL-2.0+ @@ -60,7 +60,8 @@ struct lpc32xx_i2c_registers { static struct lpc32xx_i2c_registers *lpc32xx_i2c[] = { (struct lpc32xx_i2c_registers *)I2C1_BASE, - (struct lpc32xx_i2c_registers *)I2C2_BASE + (struct lpc32xx_i2c_registers *)I2C2_BASE, + (struct lpc32xx_i2c_registers *)(USB_BASE + 0x300) }; /* Set I2C bus speed */ @@ -68,11 +69,17 @@ static unsigned int lpc32xx_i2c_set_bus_speed(struct i2c_adapter *adap, unsigned int speed) { int half_period; + int clk_rate; if (speed == 0) return -EINVAL; - half_period = (get_hclk_clk_rate() / speed) / 2; + if (adap->hwadapnr == 2) + /* OTG I2C clock source is different. */ + clk_rate = get_periph_clk_rate(); + else + clk_rate = get_hclk_clk_rate(); + half_period = (clk_rate / speed) / 2; if ((half_period > 255) || (half_period < 0)) return -EINVAL; @@ -247,3 +254,10 @@ U_BOOT_I2C_ADAP_COMPLETE(lpc32xx_1, _i2c_init, lpc32xx_i2c_probe, CONFIG_SYS_I2C_LPC32XX_SPEED, CONFIG_SYS_I2C_LPC32XX_SLAVE, 1) + +U_BOOT_I2C_ADAP_COMPLETE(lpc32xx_2, _i2c_init, NULL, + lpc32xx_i2c_read, lpc32xx_i2c_write, + lpc32xx_i2c_set_bus_speed, + 100000, + 0, + 2)