From patchwork Mon Aug 3 19:47:48 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sylvain Lemieux X-Patchwork-Id: 503283 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 41DFE140E3B for ; Tue, 4 Aug 2015 06:08:19 +1000 (AEST) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b=uHnOgYJF; dkim-atps=neutral Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 97A14A757B; Mon, 3 Aug 2015 22:07:55 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 5pTpvPR4TFco; Mon, 3 Aug 2015 22:07:55 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 703B2A7552; Mon, 3 Aug 2015 22:07:40 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id EED3A4BEA7 for ; Mon, 3 Aug 2015 21:48:23 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id Y7feBnTjPgcp for ; Mon, 3 Aug 2015 21:48:23 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail-ig0-f181.google.com (mail-ig0-f181.google.com [209.85.213.181]) by theia.denx.de (Postfix) with ESMTPS id 8923D4BEA2 for ; Mon, 3 Aug 2015 21:48:20 +0200 (CEST) Received: by iggf3 with SMTP id f3so62742835igg.1 for ; Mon, 03 Aug 2015 12:48:18 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id; bh=dl5bT1NcunGVlIPUeJWyP4APX1XHrxND7btE9Pw0/IY=; b=uHnOgYJF6CyNnkWQ6OoZrYkj3gIx3M8UICfE8ORBqsYmjBEsMR7QlUTKz0rrqLuKVJ /j2r+sbEyKG0rcOPmKXwV9uR9vpN9YDP0JHtZz+HA2MPSCMyTZC8N6XYhZD7Xo8Xm4/G pQhVXEfOSjeQRXJAq1W0o3TFHnUBDJUkMD2X1zEkMFgwdIzp0si8igrRGPKcJWjc5Qoa HAdER+Qk0mu9ebiJVudQYUrpwTMYogzSHxyJ756zqrdBVSy3ryzYWXWD9WEBsyQcnxBv qOPGhQUHHkG08E2l9aakME9mO8iQfqnWxi2rOmFvZzfRdYeuMKeHC1YLRAf7AL9pEb0U iMzQ== X-Received: by 10.50.80.19 with SMTP id n19mr21447082igx.30.1438631298878; Mon, 03 Aug 2015 12:48:18 -0700 (PDT) Received: from CABRO3AP00510.americas.tsp.ad ([74.51.240.241]) by smtp.gmail.com with ESMTPSA id o19sm6409193igs.18.2015.08.03.12.48.17 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 03 Aug 2015 12:48:18 -0700 (PDT) From: slemieux.tyco@gmail.com To: u-boot@lists.denx.de Date: Mon, 3 Aug 2015 15:47:48 -0400 Message-Id: <1438631269-31670-5-git-send-email-slemieux.tyco@gmail.com> X-Mailer: git-send-email 1.8.3.1 X-Mailman-Approved-At: Mon, 03 Aug 2015 22:07:26 +0200 Cc: scottwood@freescale.com, marex@denx.de, vz@mleia.com Subject: [U-Boot] [PATCH v3 4/5] i2c: lpc32xx: add support for OTG I2C X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.15 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" From: Sylvain Lemieux Updated the LPC32xx I2C driver to support the OTG I2C that is part of the USB module. Signed-off-by: Sylvain Lemieux --- Changes from v2 to v3: * New patch added in v3. drivers/i2c/lpc32xx_i2c.c | 20 +++++++++++++++++--- 1 file changed, 17 insertions(+), 3 deletions(-) diff --git a/drivers/i2c/lpc32xx_i2c.c b/drivers/i2c/lpc32xx_i2c.c index 98106fa..be166b0 100644 --- a/drivers/i2c/lpc32xx_i2c.c +++ b/drivers/i2c/lpc32xx_i2c.c @@ -1,7 +1,7 @@ /* * LPC32xx I2C interface driver * - * (C) Copyright 2014 DENX Software Engineering GmbH + * (C) Copyright 2014-2015 DENX Software Engineering GmbH * Written-by: Albert ARIBAUD - 3ADEV * * SPDX-License-Identifier: GPL-2.0+ @@ -60,7 +60,8 @@ struct lpc32xx_i2c_registers { static struct lpc32xx_i2c_registers *lpc32xx_i2c[] = { (struct lpc32xx_i2c_registers *)I2C1_BASE, - (struct lpc32xx_i2c_registers *)I2C2_BASE + (struct lpc32xx_i2c_registers *)I2C2_BASE, + (struct lpc32xx_i2c_registers *)(USB_BASE + 0x300) }; /* Set I2C bus speed */ @@ -68,11 +69,17 @@ static unsigned int lpc32xx_i2c_set_bus_speed(struct i2c_adapter *adap, unsigned int speed) { int half_period; + int clk_rate; if (speed == 0) return -EINVAL; - half_period = (get_hclk_clk_rate() / speed) / 2; + if (adap->hwadapnr == 2) + /* OTG I2C clock source is different. */ + clk_rate = get_periph_clk_rate(); + else + clk_rate = get_hclk_clk_rate(); + half_period = (clk_rate / speed) / 2; if ((half_period > 255) || (half_period < 0)) return -EINVAL; @@ -247,3 +254,10 @@ U_BOOT_I2C_ADAP_COMPLETE(lpc32xx_1, _i2c_init, lpc32xx_i2c_probe, CONFIG_SYS_I2C_LPC32XX_SPEED, CONFIG_SYS_I2C_LPC32XX_SLAVE, 1) + +U_BOOT_I2C_ADAP_COMPLETE(lpc32xx_2, _i2c_init, NULL, + lpc32xx_i2c_read, lpc32xx_i2c_write, + lpc32xx_i2c_set_bus_speed, + 100000, + 0, + 2)