From patchwork Sat Aug 1 21:34:35 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marek Vasut X-Patchwork-Id: 502855 X-Patchwork-Delegate: marek.vasut@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 0757B1402ED for ; Sun, 2 Aug 2015 07:36:49 +1000 (AEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id F2D39A7447; Sat, 1 Aug 2015 23:36:28 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id VJmltVnQI7eb; Sat, 1 Aug 2015 23:36:28 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 8F64B4BD8C; Sat, 1 Aug 2015 23:35:44 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 574AD4BD25 for ; Sat, 1 Aug 2015 23:35:17 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 3urt9QhLzNJB for ; Sat, 1 Aug 2015 23:35:17 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail-out.m-online.net (mail-out.m-online.net [212.18.0.9]) by theia.denx.de (Postfix) with ESMTPS id 371394BD1A for ; Sat, 1 Aug 2015 23:35:14 +0200 (CEST) Received: from mail.nefkom.net (unknown [192.168.8.184]) by mail-out.m-online.net (Postfix) with ESMTP id 3mkJfk4JZGz3hjBh; Sat, 1 Aug 2015 23:35:10 +0200 (CEST) X-Auth-Info: 9yXStr/Shr5Mj5OSa7L6vyDioprYuXWENKjyS969QvE= Received: from chi.lan (host-82-135-33-74.customer.m-online.net [82.135.33.74]) by smtp-auth.mnet-online.de (Postfix) with ESMTPA id 3mkJfk29B7zvdWt; Sat, 1 Aug 2015 23:35:10 +0200 (CEST) From: Marek Vasut To: u-boot@lists.denx.de Date: Sat, 1 Aug 2015 23:34:35 +0200 Message-Id: <1438464897-8051-7-git-send-email-marex@denx.de> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1438464897-8051-1-git-send-email-marex@denx.de> References: <1438464897-8051-1-git-send-email-marex@denx.de> Cc: Marek Vasut , trini@konsulko.com Subject: [U-Boot] [PATCH 06/28] ddr: altera: sdram: Clean up set_sdr_addr_rw() X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.15 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Get rid of the constant clrsetbits_le32(), instead prepare the whole content of the register once and write it at the end of the function. Signed-off-by: Marek Vasut --- drivers/ddr/altera/sdram.c | 30 ++++++++++-------------------- 1 file changed, 10 insertions(+), 20 deletions(-) diff --git a/drivers/ddr/altera/sdram.c b/drivers/ddr/altera/sdram.c index f4f3545..143f41b 100644 --- a/drivers/ddr/altera/sdram.c +++ b/drivers/ddr/altera/sdram.c @@ -371,34 +371,24 @@ static void set_sdr_dram_timing(void) static void set_sdr_addr_rw(void) { - int rows; - - debug("Configuring DRAMADDRW\n"); - clrsetbits_le32(&sdr_ctrl->dram_addrw, SDR_CTRLGRP_DRAMADDRW_COLBITS_MASK, - CONFIG_HPS_SDR_CTRLCFG_DRAMADDRW_COLBITS << - SDR_CTRLGRP_DRAMADDRW_COLBITS_LSB); /* * SDRAM Failure When Accessing Non-Existent Memory - * Update Preloader to artificially increase the number of rows so - * that the memory thinks it has 4GB of RAM. - */ - rows = get_errata_rows(); - - clrsetbits_le32(&sdr_ctrl->dram_addrw, SDR_CTRLGRP_DRAMADDRW_ROWBITS_MASK, - rows << SDR_CTRLGRP_DRAMADDRW_ROWBITS_LSB); - - clrsetbits_le32(&sdr_ctrl->dram_addrw, SDR_CTRLGRP_DRAMADDRW_BANKBITS_MASK, - CONFIG_HPS_SDR_CTRLCFG_DRAMADDRW_BANKBITS << - SDR_CTRLGRP_DRAMADDRW_BANKBITS_LSB); - /* SDRAM Failure When Accessing Non-Existent Memory * Set SDR_CTRLGRP_DRAMADDRW_CSBITS_LSB to * log2(number of chip select bits). Since there's only * 1 or 2 chip selects, log2(1) => 0, and log2(2) => 1, * which is the same as "chip selects" - 1. */ - clrsetbits_le32(&sdr_ctrl->dram_addrw, SDR_CTRLGRP_DRAMADDRW_CSBITS_MASK, - (CONFIG_HPS_SDR_CTRLCFG_DRAMADDRW_CSBITS - 1) << + const int rows = get_errata_rows(); + const u32 dram_addrw = + (CONFIG_HPS_SDR_CTRLCFG_DRAMADDRW_COLBITS << + SDR_CTRLGRP_DRAMADDRW_COLBITS_LSB) | + (rows << SDR_CTRLGRP_DRAMADDRW_ROWBITS_LSB) | + (CONFIG_HPS_SDR_CTRLCFG_DRAMADDRW_BANKBITS << + SDR_CTRLGRP_DRAMADDRW_BANKBITS_LSB) | + ((CONFIG_HPS_SDR_CTRLCFG_DRAMADDRW_CSBITS - 1) << SDR_CTRLGRP_DRAMADDRW_CSBITS_LSB); + debug("Configuring DRAMADDRW\n"); + writel(dram_addrw, &sdr_ctrl->dram_addrw); } static void set_sdr_static_cfg(void)