From patchwork Mon Jul 27 20:50:45 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marek Vasut X-Patchwork-Id: 500746 X-Patchwork-Delegate: marek.vasut@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id B38BB140318 for ; Tue, 28 Jul 2015 07:04:28 +1000 (AEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id B81904B832; Mon, 27 Jul 2015 23:01:32 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id n9bbXBBQo4oS; Mon, 27 Jul 2015 23:01:32 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id A3BB44B7DE; Mon, 27 Jul 2015 22:58:12 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id B34BA4B73A for ; Mon, 27 Jul 2015 22:53:54 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id tE1-BeL86JmR for ; Mon, 27 Jul 2015 22:53:54 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail-out.m-online.net (mail-out.m-online.net [212.18.0.9]) by theia.denx.de (Postfix) with ESMTPS id 28E144B774 for ; Mon, 27 Jul 2015 22:53:31 +0200 (CEST) Received: from mail.nefkom.net (unknown [192.168.8.184]) by mail-out.m-online.net (Postfix) with ESMTP id 3mgCyy6rwQz3hjYs; Mon, 27 Jul 2015 22:53:30 +0200 (CEST) X-Auth-Info: Z/20CbG/3kPGGJBUKiNzjQ9cJvhSiaS8U1bjiJdXUHk= Received: from chi.lan (host-82-135-33-74.customer.m-online.net [82.135.33.74]) by smtp-auth.mnet-online.de (Postfix) with ESMTPA id 3mgCyy4Yt5zvdWS; Mon, 27 Jul 2015 22:53:30 +0200 (CEST) From: Marek Vasut To: u-boot@lists.denx.de Date: Mon, 27 Jul 2015 22:50:45 +0200 Message-Id: <1438030335-10631-83-git-send-email-marex@denx.de> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1438030335-10631-1-git-send-email-marex@denx.de> References: <1438030335-10631-1-git-send-email-marex@denx.de> Cc: Marek Vasut , trini@konsulko.com Subject: [U-Boot] [PATCH 082/172] ddr: altera: Clean up run_mem_calibrate() X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.15 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Clean the function up slightly by using clrsetbits_le32() to flip bits in registers instead of cryptic bitmasks. Zap condition checking for PHY_DEBUG_IN_DEBUG_MODE flag, which is never set. Split the calibration report into separate debug_mem_calibrate() function. Signed-off-by: Marek Vasut --- drivers/ddr/altera/sequencer.c | 56 +++++++++++++++++++++++++----------------- 1 file changed, 34 insertions(+), 22 deletions(-) diff --git a/drivers/ddr/altera/sequencer.c b/drivers/ddr/altera/sequencer.c index 885bdd8..13551db 100644 --- a/drivers/ddr/altera/sequencer.c +++ b/drivers/ddr/altera/sequencer.c @@ -3448,44 +3448,57 @@ static uint32_t mem_calibrate(void) return 1; } -static uint32_t run_mem_calibrate(void) +/** + * run_mem_calibrate() - Perform memory calibration + * + * This function triggers the entire memory calibration procedure. + */ +static int run_mem_calibrate(void) { - uint32_t pass; - uint32_t debug_info; + int pass; debug("%s:%d\n", __func__, __LINE__); /* Reset pass/fail status shown on afi_cal_success/fail */ writel(PHY_MGR_CAL_RESET, &phy_mgr_cfg->cal_status); - /* stop tracking manger */ - uint32_t ctrlcfg = readl(&sdr_ctrl->ctrl_cfg); - - writel(ctrlcfg & 0xFFBFFFFF, &sdr_ctrl->ctrl_cfg); + /* Stop tracking manager. */ + clrbits_le32(&sdr_ctrl->ctrl_cfg, 1 << 22); phy_mgr_initialize(); rw_mgr_mem_initialize(); + /* Perform the actual memory calibration. */ pass = mem_calibrate(); mem_precharge_and_activate(); writel(0, &phy_mgr_cmd->fifo_reset); + /* Handoff. */ + rw_mgr_mem_handoff(); /* - * Handoff: - * Don't return control of the PHY back to AFI when in debug mode. + * In Hard PHY this is a 2-bit control: + * 0: AFI Mux Select + * 1: DDIO Mux Select */ - if ((gbl->phy_debug_mode_flags & PHY_DEBUG_IN_DEBUG_MODE) == 0) { - rw_mgr_mem_handoff(); - /* - * In Hard PHY this is a 2-bit control: - * 0: AFI Mux Select - * 1: DDIO Mux Select - */ - writel(0x2, &phy_mgr_cfg->mux_sel); - } + writel(0x2, &phy_mgr_cfg->mux_sel); - writel(ctrlcfg, &sdr_ctrl->ctrl_cfg); + /* Start tracking manager. */ + setbits_le32(&sdr_ctrl->ctrl_cfg, 1 << 22); + + return pass; +} + +/** + * debug_mem_calibrate() - Report result of memory calibration + * @pass: Value indicating whether calibration passed or failed + * + * This function reports the results of the memory calibration + * and writes debug information into the register file. + */ +static void debug_mem_calibrate(int pass) +{ + uint32_t debug_info; if (pass) { printf("%s: CALIBRATION PASSED\n", __FILE__); @@ -3524,7 +3537,7 @@ static uint32_t run_mem_calibrate(void) writel(debug_info, &sdr_reg_file->failing_stage); } - return pass; + printf("%s: Calibration complete\n", __FILE__); } /** @@ -3732,7 +3745,6 @@ int sdram_calibration_full(void) skip_delay_mask = 0x0; pass = run_mem_calibrate(); - - printf("%s: Calibration complete\n", __FILE__); + debug_mem_calibrate(pass); return pass; }