From patchwork Mon Jul 27 20:49:52 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marek Vasut X-Patchwork-Id: 500690 X-Patchwork-Delegate: marek.vasut@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id E488F140D23 for ; Tue, 28 Jul 2015 06:56:21 +1000 (AEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 8D58F4B7BE; Mon, 27 Jul 2015 22:56:00 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id TEELYyS8hTYj; Mon, 27 Jul 2015 22:56:00 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 1B2FB4B741; Mon, 27 Jul 2015 22:55:20 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 8BBCB4B76D for ; Mon, 27 Jul 2015 22:53:17 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id cV6-8glR1cNj for ; Mon, 27 Jul 2015 22:53:17 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail-out.m-online.net (mail-out.m-online.net [212.18.0.9]) by theia.denx.de (Postfix) with ESMTPS id 525954B6FA for ; Mon, 27 Jul 2015 22:53:10 +0200 (CEST) Received: from mail.nefkom.net (unknown [192.168.8.184]) by mail-out.m-online.net (Postfix) with ESMTP id 3mgCyZ0tf9z3hjY2; Mon, 27 Jul 2015 22:53:10 +0200 (CEST) X-Auth-Info: nUOcbX6c31RC5aaMA1jWdssHI2vYqNKjZba40MxSTZs= Received: from chi.lan (host-82-135-33-74.customer.m-online.net [82.135.33.74]) by smtp-auth.mnet-online.de (Postfix) with ESMTPA id 3mgCyY63PyzvdWS; Mon, 27 Jul 2015 22:53:09 +0200 (CEST) From: Marek Vasut To: u-boot@lists.denx.de Date: Mon, 27 Jul 2015 22:49:52 +0200 Message-Id: <1438030335-10631-30-git-send-email-marex@denx.de> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1438030335-10631-1-git-send-email-marex@denx.de> References: <1438030335-10631-1-git-send-email-marex@denx.de> Cc: Marek Vasut , trini@konsulko.com Subject: [U-Boot] [PATCH 029/172] arm: socfpga: spl: Add support for selecting boot device from BSEL X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.15 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Rework spl_boot_device() such that it reads the BSEL settings from system manager and decides from where to load U-Boot based on this information. Signed-off-by: Marek Vasut --- arch/arm/mach-socfpga/spl.c | 35 +++++++++++++++++++++++------------ 1 file changed, 23 insertions(+), 12 deletions(-) diff --git a/arch/arm/mach-socfpga/spl.c b/arch/arm/mach-socfpga/spl.c index 7f0ebeb..82570f8 100644 --- a/arch/arm/mach-socfpga/spl.c +++ b/arch/arm/mach-socfpga/spl.c @@ -28,19 +28,32 @@ static struct scu_registers *scu_regs = (struct scu_registers *)SOCFPGA_MPUSCU_ADDRESS; static struct nic301_registers *nic301_regs = (struct nic301_registers *)SOCFPGA_L3REGS_ADDRESS; +static struct socfpga_system_manager *sysmgr_regs = + (struct socfpga_system_manager *)SOCFPGA_SYSMGR_ADDRESS; u32 spl_boot_device(void) { -#ifdef CONFIG_SPL_SPI_SUPPORT - socfpga_per_reset(SOCFPGA_RESET(QSPI), 0); - return BOOT_DEVICE_SPI; -#elif CONFIG_SPL_MMC_SUPPORT - socfpga_per_reset(SOCFPGA_RESET(SDMMC), 0); - socfpga_per_reset(SOCFPGA_RESET(DMA), 0); - return BOOT_DEVICE_MMC1; -#else - return BOOT_DEVICE_RAM; -#endif + const u32 bsel = readl(&sysmgr_regs->bootinfo); + + switch (bsel & 0x7) { + case 0x1: /* FPGA (HPS2FPGA Bridge) */ + return BOOT_DEVICE_RAM; + case 0x2: /* NAND Flash (1.8V) */ + case 0x3: /* NAND Flash (3.0V) */ + return BOOT_DEVICE_NAND; + case 0x4: /* SD/MMC External Transceiver (1.8V) */ + case 0x5: /* SD/MMC Internal Transceiver (3.0V) */ + socfpga_per_reset(SOCFPGA_RESET(SDMMC), 0); + socfpga_per_reset(SOCFPGA_RESET(DMA), 0); + return BOOT_DEVICE_MMC1; + case 0x6: /* QSPI Flash (1.8V) */ + case 0x7: /* QSPI Flash (3.0V) */ + socfpga_per_reset(SOCFPGA_RESET(QSPI), 0); + return BOOT_DEVICE_SPI; + default: + printf("Invalid boot device (bsel=%08x)!\n", bsel); + hang(); + } } #ifdef CONFIG_SPL_MMC_SUPPORT @@ -69,8 +82,6 @@ void board_init_f(ulong dummy) #ifndef CONFIG_SOCFPGA_VIRTUAL_TARGET const struct cm_config *cm_default_cfg = cm_get_default_config(); #endif - struct socfpga_system_manager *sysmgr_regs = - (struct socfpga_system_manager *)SOCFPGA_SYSMGR_ADDRESS; unsigned long sdram_size; unsigned long reg;