@@ -31,7 +31,10 @@ static struct nic301_registers *nic301_regs =
u32 spl_boot_device(void)
{
-#ifdef CONFIG_SPL_MMC_SUPPORT
+#ifdef CONFIG_SPL_SPI_SUPPORT
+ socfpga_per_reset(SOCFPGA_RESET(QSPI), 0);
+ return BOOT_DEVICE_SPI;
+#elif CONFIG_SPL_MMC_SUPPORT
socfpga_per_reset(SOCFPGA_RESET(SDMMC), 0);
socfpga_per_reset(SOCFPGA_RESET(DMA), 0);
return BOOT_DEVICE_MMC1;
@@ -9,3 +9,7 @@ CONFIG_OF_CONTROL=y
CONFIG_SPI_FLASH=y
CONFIG_SPL_DM=y
CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_DM_SEQ_ALIAS=y
+CONFIG_DM_SPI=y
+CONFIG_DM_SPI_FLASH=y
+CONFIG_SPL_SPI_SUPPORT=y
@@ -11,3 +11,7 @@ CONFIG_NETDEVICES=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_SPL_DM=y
CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_DM_SEQ_ALIAS=y
+CONFIG_DM_SPI=y
+CONFIG_DM_SPI_FLASH=y
+CONFIG_SPL_SPI_SUPPORT=y
@@ -11,3 +11,7 @@ CONFIG_NETDEVICES=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_SPL_DM=y
CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_DM_SEQ_ALIAS=y
+CONFIG_DM_SPI=y
+CONFIG_DM_SPI_FLASH=y
+CONFIG_SPL_SPI_SUPPORT=y
@@ -307,6 +307,7 @@ unsigned int cm_get_qspi_controller_clk_hz(void);
#define CONFIG_SPL_WATCHDOG_SUPPORT
#define CONFIG_SPL_SERIAL_SUPPORT
#define CONFIG_SPL_MMC_SUPPORT
+#define CONFIG_SPL_SPI_SUPPORT
/* SPL SDMMC boot support */
#ifdef CONFIG_SPL_MMC_SUPPORT
@@ -321,6 +322,14 @@ unsigned int cm_get_qspi_controller_clk_hz(void);
#endif
#endif
+/* SPL QSPI boot support */
+#ifdef CONFIG_SPL_SPI_SUPPORT
+#define CONFIG_DM_SEQ_ALIAS 1
+#define CONFIG_SPL_SPI_FLASH_SUPPORT
+#define CONFIG_SPL_SPI_LOAD
+#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x40000
+#endif
+
/*
* Stack setup
*/
Add code and configuration options to support booting from QSPI NOR. Enable support for booting from QSPI NOR. Signed-off-by: Marek Vasut <marex@denx.de> --- arch/arm/mach-socfpga/spl.c | 5 ++++- configs/socfpga_arria5_defconfig | 4 ++++ configs/socfpga_cyclone5_defconfig | 4 ++++ configs/socfpga_socrates_defconfig | 4 ++++ include/configs/socfpga_common.h | 9 +++++++++ 5 files changed, 25 insertions(+), 1 deletion(-)