From patchwork Mon Jul 27 20:52:12 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marek Vasut X-Patchwork-Id: 500816 X-Patchwork-Delegate: marek.vasut@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id D0CE3140291 for ; Tue, 28 Jul 2015 07:16:18 +1000 (AEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 42AFE4B952; Mon, 27 Jul 2015 23:08:49 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id sd2bKsIaa-M5; Mon, 27 Jul 2015 23:08:49 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id EC2D84BC5F; Mon, 27 Jul 2015 23:05:24 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 61B9E4B78E for ; Mon, 27 Jul 2015 22:54:51 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id LaFxm5nZ1ETe for ; Mon, 27 Jul 2015 22:54:51 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail-out.m-online.net (mail-out.m-online.net [212.18.0.9]) by theia.denx.de (Postfix) with ESMTPS id C15354B7C6 for ; Mon, 27 Jul 2015 22:54:06 +0200 (CEST) Received: from mail.nefkom.net (unknown [192.168.8.184]) by mail-out.m-online.net (Postfix) with ESMTP id 3mgCzf48ynz3hjbD; Mon, 27 Jul 2015 22:54:06 +0200 (CEST) X-Auth-Info: RuVALp7z/uSKHM9f2rOUruCEZe1FpnvkFADOCbL787w= Received: from chi.lan (host-82-135-33-74.customer.m-online.net [82.135.33.74]) by smtp-auth.mnet-online.de (Postfix) with ESMTPA id 3mgCzf26vXzvdWS; Mon, 27 Jul 2015 22:54:06 +0200 (CEST) From: Marek Vasut To: u-boot@lists.denx.de Date: Mon, 27 Jul 2015 22:52:12 +0200 Message-Id: <1438030335-10631-170-git-send-email-marex@denx.de> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1438030335-10631-1-git-send-email-marex@denx.de> References: <1438030335-10631-1-git-send-email-marex@denx.de> Cc: Marek Vasut , trini@konsulko.com Subject: [U-Boot] [PATCH 169/172] ddr: altera: Clean up of delay_for_n_mem_clocks() part 2 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.15 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Factor out (afi_clocks - 1) into a single place instead of having it all around the function. Signed-off-by: Marek Vasut --- drivers/ddr/altera/sequencer.c | 18 ++++++++++-------- 1 file changed, 10 insertions(+), 8 deletions(-) diff --git a/drivers/ddr/altera/sequencer.c b/drivers/ddr/altera/sequencer.c index 5a6c991..25de209 100644 --- a/drivers/ddr/altera/sequencer.c +++ b/drivers/ddr/altera/sequencer.c @@ -767,8 +767,10 @@ static void delay_for_n_mem_clocks(const u32 clocks) debug("%s:%d: clocks=%u ... start\n", __func__, __LINE__, clocks); - /* scale (rounding up) to get afi clocks */ + /* Scale (rounding up) to get afi clocks. */ afi_clocks = DIV_ROUND_UP(clocks, AFI_RATE_RATIO); + if (afi_clocks) /* Temporary underflow protection */ + afi_clocks--; /* * Note, we don't bother accounting for being off a little @@ -779,18 +781,18 @@ static void delay_for_n_mem_clocks(const u32 clocks) */ if (afi_clocks == 0) { ; - } else if (afi_clocks <= 0x100) { - inner = afi_clocks - 1; + } else if (afi_clocks < 0x100) { + inner = afi_clocks; outer = 0; c_loop = 0; - } else if (afi_clocks <= 0x10000) { + } else if (afi_clocks < 0x10000) { inner = 0xff; - outer = (afi_clocks - 1) >> 8; + outer = afi_clocks >> 8; c_loop = 0; - } else { + } else { /* >= 0x10000 */ inner = 0xff; outer = 0xff; - c_loop = (afi_clocks - 1) >> 16; + c_loop = afi_clocks >> 16; } /* @@ -810,7 +812,7 @@ static void delay_for_n_mem_clocks(const u32 clocks) * and sequencer rom and keeps the delays more accurate and reduces * overhead */ - if (afi_clocks <= 0x100) { + if (afi_clocks < 0x100) { writel(SKIP_DELAY_LOOP_VALUE_OR_ZERO(inner), &sdr_rw_load_mgr_regs->load_cntr1);