From patchwork Wed Jul 22 15:49:35 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Simon Glass X-Patchwork-Id: 498680 X-Patchwork-Delegate: sjg@chromium.org Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 0B3D61402B8 for ; Thu, 23 Jul 2015 01:59:15 +1000 (AEST) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=google.com header.i=@google.com header.b=eaY0MfdX; dkim-atps=neutral Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id D70384B7FD; Wed, 22 Jul 2015 17:57:48 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id kg_v0_EBebd0; Wed, 22 Jul 2015 17:57:48 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id A57D24B8AE; Wed, 22 Jul 2015 17:57:19 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 899994B7D0 for ; Wed, 22 Jul 2015 17:57:05 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id DtRRosXNHAxz for ; Wed, 22 Jul 2015 17:57:05 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail-ig0-f182.google.com (mail-ig0-f182.google.com [209.85.213.182]) by theia.denx.de (Postfix) with ESMTPS id 2D68A4B7CB for ; Wed, 22 Jul 2015 17:57:02 +0200 (CEST) Received: by igbpg9 with SMTP id pg9so136713504igb.0 for ; Wed, 22 Jul 2015 08:57:01 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references; bh=/gLZyQ/dD14QZRK6hYwtjmtHE75aaCdlxyME5v1QcMY=; b=eaY0MfdXrIBINPaaq1Meo7Kq3LVgBoiKbYN83j8GDc6dLxwJUUF415QEok5/aaIh8F 0stioBmZ0bJytdNodm5lW1nV3CYpYaNsVdaIdT1OHmPaKQcDc3b1gAS4Aj+oN1/4y43E tfkRYxzoUv53gKF/gFWxBLGyxAxaq5p0jDfj1ytNYbDON6P/YObPg2NtEGJRl/16b0WC y0M9uX2g+lnrxqGYBlL+y5brTm88AVUEYYrTcoXydDlOu3Vvei+AO4laR4z+IERqGbWR TE+5z5vjRlNFYoy5DvrZtSDJmQry0pD9JbOHGjv1ZNywjDLriXlVFxbTISJqg0jv/Era eknw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references; bh=/gLZyQ/dD14QZRK6hYwtjmtHE75aaCdlxyME5v1QcMY=; b=dlZrueyVV3v84uyQGJUblSUGCBY4WCRReclmcGrsUQld1g6Ch1YCa5g2n5TFEyrPIt 7y0juugd6DFdVDBiRDx7tzDcHBgWMroTOCD1reI86OXVE5ZUDm/mSZs0chPlN4m2SBys 6swj3V0PrrDMDgeOSeIK/mwB+9bBPaTBb/HrgpvFlxi72GjWlSxVONgQhRn25fKo8Ypf Dm/VOkkoRYZ5eEGdn+pt4GKXdDqKFi6KZ2cfWNtQs797mxQ99BSKfWx1ZzNQ95I+zysK hpUGDY8KCCCeuTOFgP6jNNm6q29PwESE8MMsvZkgeoYDvX90PUbnezHSdxxXCDnMbQOz xKBg== X-Gm-Message-State: ALoCoQkVuy+hYDs9sVrwQk7jcYMPNUzBmC1b7yFS46nOkFQpB5GaToJpzqlAczWPGUxx0MCwprZj X-Received: by 10.50.134.226 with SMTP id pn2mr7416158igb.21.1437580621527; Wed, 22 Jul 2015 08:57:01 -0700 (PDT) Received: from kaki.bld.corp.google.com ([172.29.216.32]) by smtp.gmail.com with ESMTPSA id g12sm1063236ioe.28.2015.07.22.08.56.59 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 22 Jul 2015 08:56:59 -0700 (PDT) Received: by kaki.bld.corp.google.com (Postfix, from userid 121222) id 1EBF6221941; Wed, 22 Jul 2015 09:50:46 -0600 (MDT) From: Simon Glass To: U-Boot Mailing List Date: Wed, 22 Jul 2015 09:49:35 -0600 Message-Id: <1437580180-6405-44-git-send-email-sjg@chromium.org> X-Mailer: git-send-email 2.4.3.573.g4eafbef In-Reply-To: <1437580180-6405-1-git-send-email-sjg@chromium.org> References: <1437580180-6405-1-git-send-email-sjg@chromium.org> Cc: Graeme Russ , Tom Rini , Ben Stoltz Subject: [U-Boot] [PATCH 43/48] x86: Handle running as EFI payload X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.15 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" When U-Boot runs as an EFI payload it needs to avoid setting up the CPU again. Also U-Boot currently does not handle interrupts for many devices, so run with interrupts disabled. Signed-off-by: Simon Glass --- arch/x86/Kconfig | 16 ++++++++++++++++ arch/x86/cpu/cpu.c | 21 +++++++++++++-------- arch/x86/cpu/interrupts.c | 10 ++++++++-- arch/x86/lib/bootm.c | 2 ++ 4 files changed, 39 insertions(+), 10 deletions(-) diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig index f124d58..c64c626 100644 --- a/arch/x86/Kconfig +++ b/arch/x86/Kconfig @@ -194,6 +194,7 @@ config X86_RAMTEST config HAVE_FSP bool "Add an Firmware Support Package binary" + depends on !EFI help Select this option to add an Firmware Support Package binary to the resulting U-Boot image. It is a binary blob which U-Boot uses @@ -309,6 +310,7 @@ menu "System tables" config GENERATE_PIRQ_TABLE bool "Generate a PIRQ table" + depends on !EFI default n help Generate a PIRQ routing table for this board. The PIRQ routing table @@ -319,6 +321,7 @@ config GENERATE_PIRQ_TABLE config GENERATE_SFI_TABLE bool "Generate a SFI (Simple Firmware Interface) table" + depends on !EFI help The Simple Firmware Interface (SFI) provides a lightweight method for platform firmware to pass information to the operating system @@ -333,6 +336,7 @@ config GENERATE_SFI_TABLE config GENERATE_MP_TABLE bool "Generate an MP (Multi-Processor) table" + depends on !EFI default n help Generate an MP (Multi-Processor) table for this board. The MP table @@ -383,4 +387,16 @@ config PCIE_ECAM_SIZE so a default 0x10000000 size covers all of the 256 buses which is the maximum number of PCI buses as defined by the PCI specification. +if EFI + +config SYS_CAR_ADDR + hex + default 0x100000 + +config SYS_CAR_SIZE + hex + default 0x20000 + +endif + endmenu diff --git a/arch/x86/cpu/cpu.c b/arch/x86/cpu/cpu.c index d233a45..129777c 100644 --- a/arch/x86/cpu/cpu.c +++ b/arch/x86/cpu/cpu.c @@ -330,13 +330,15 @@ int x86_cpu_init_f(void) const u32 em_rst = ~X86_CR0_EM; const u32 mp_ne_set = X86_CR0_MP | X86_CR0_NE; - /* initialize FPU, reset EM, set MP and NE */ - asm ("fninit\n" \ - "movl %%cr0, %%eax\n" \ - "andl %0, %%eax\n" \ - "orl %1, %%eax\n" \ - "movl %%eax, %%cr0\n" \ - : : "i" (em_rst), "i" (mp_ne_set) : "eax"); + if (ll_boot_init()) { + /* initialize FPU, reset EM, set MP and NE */ + asm ("fninit\n" \ + "movl %%cr0, %%eax\n" \ + "andl %0, %%eax\n" \ + "orl %1, %%eax\n" \ + "movl %%eax, %%cr0\n" \ + : : "i" (em_rst), "i" (mp_ne_set) : "eax"); + } /* identify CPU via cpuid and store the decoded info into gd->arch */ if (has_cpuid()) { @@ -712,5 +714,8 @@ __weak int x86_init_cpus(void) int cpu_init_r(void) { - return x86_init_cpus(); + if (ll_boot_init()) + return x86_init_cpus(); + + return 0; } diff --git a/arch/x86/cpu/interrupts.c b/arch/x86/cpu/interrupts.c index a86c673..7df50bd 100644 --- a/arch/x86/cpu/interrupts.c +++ b/arch/x86/cpu/interrupts.c @@ -254,8 +254,14 @@ int interrupt_init(void) /* Initialize core interrupt and exception functionality of CPU */ cpu_init_interrupts(); - /* It is now safe to enable interrupts */ - enable_interrupts(); + /* + * It is now safe to enable interrupts. + * + * TODO(sjg@chromium.org): But we don't handle these correctly when + * booted from EFI. + */ + if (ll_boot_init()) + enable_interrupts(); #endif return 0; diff --git a/arch/x86/lib/bootm.c b/arch/x86/lib/bootm.c index 445ee6e..3ad941f 100644 --- a/arch/x86/lib/bootm.c +++ b/arch/x86/lib/bootm.c @@ -165,6 +165,7 @@ int boot_linux_kernel(ulong setup_base, ulong load_address, bool image_64bit) * U-boot is setting them up that way for itself in * arch/i386/cpu/cpu.c. */ +#ifndef CONFIG_ARCH_EFI __asm__ __volatile__ ( "movl $0, %%ebp\n" "cli\n" @@ -173,6 +174,7 @@ int boot_linux_kernel(ulong setup_base, ulong load_address, bool image_64bit) [boot_params] "S"(setup_base), "b"(0), "D"(0) ); +#endif } /* We can't get to here */