From patchwork Wed Jul 22 15:39:11 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lokesh Vutla X-Patchwork-Id: 498630 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 6138F1402C3 for ; Thu, 23 Jul 2015 01:42:14 +1000 (AEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id E01AA4B7CA; Wed, 22 Jul 2015 17:41:17 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id Bn6iDCedmXT7; Wed, 22 Jul 2015 17:41:17 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 76B7E4B742; Wed, 22 Jul 2015 17:41:13 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 330E04B6EB for ; Wed, 22 Jul 2015 17:41:09 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 1gYeQAK6fB4N for ; Wed, 22 Jul 2015 17:41:09 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from comal.ext.ti.com (comal.ext.ti.com [198.47.26.152]) by theia.denx.de (Postfix) with ESMTPS id A1DB84B73E for ; Wed, 22 Jul 2015 17:41:06 +0200 (CEST) Received: from dflxv15.itg.ti.com ([128.247.5.124]) by comal.ext.ti.com (8.13.7/8.13.7) with ESMTP id t6MFf40g020114; Wed, 22 Jul 2015 10:41:04 -0500 Received: from DFLE73.ent.ti.com (dfle73.ent.ti.com [128.247.5.110]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id t6MFf4FZ007329; Wed, 22 Jul 2015 10:41:04 -0500 Received: from dlep32.itg.ti.com (157.170.170.100) by DFLE73.ent.ti.com (128.247.5.110) with Microsoft SMTP Server id 14.3.224.2; Wed, 22 Jul 2015 10:41:05 -0500 Received: from a0131933.india.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dlep32.itg.ti.com (8.14.3/8.13.8) with ESMTP id t6MFewKD023756; Wed, 22 Jul 2015 10:41:01 -0500 From: Lokesh Vutla To: , Date: Wed, 22 Jul 2015 21:09:11 +0530 Message-ID: <1437579558-26579-2-git-send-email-lokeshvutla@ti.com> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1437579558-26579-1-git-send-email-lokeshvutla@ti.com> References: <1437579558-26579-1-git-send-email-lokeshvutla@ti.com> MIME-Version: 1.0 Cc: nsekhar@ti.com, t-kristo@ti.com Subject: [U-Boot] [PATCH 1/8] ARM: keystone2: Cleanup SoC detection X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.15 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Add proper register definition for JTAG ID and cleanup cpu_is_* functions. Signed-off-by: Lokesh Vutla Reviewed-by: Vitaly Andrianov Reviewed-by: Tom Rini --- arch/arm/mach-keystone/include/mach/hardware.h | 42 ++++++++++++++++---------- 1 file changed, 26 insertions(+), 16 deletions(-) diff --git a/arch/arm/mach-keystone/include/mach/hardware.h b/arch/arm/mach-keystone/include/mach/hardware.h index 16cbcee..15c25b1 100644 --- a/arch/arm/mach-keystone/include/mach/hardware.h +++ b/arch/arm/mach-keystone/include/mach/hardware.h @@ -237,6 +237,17 @@ typedef volatile unsigned int *dv_reg_p; /* SGMII SerDes */ #define KS2_SGMII_SERDES_BASE 0x0232a000 +/* JTAG ID register */ +#define JTAGID_VARIANT_SHIFT 28 +#define JTAGID_VARIANT_MASK (0xf << 28) +#define JTAGID_PART_NUM_SHIFT 12 +#define JTAGID_PART_NUM_MASK (0xffff << 12) + +/* PART NUMBER definitions */ +#define CPU_66AK2Hx 0xb981 +#define CPU_66AK2Ex 0xb9a6 +#define CPU_66AK2Lx 0xb9a7 + #ifdef CONFIG_SOC_K2HK #include #endif @@ -250,34 +261,33 @@ typedef volatile unsigned int *dv_reg_p; #endif #ifndef __ASSEMBLY__ -static inline int cpu_is_k2hk(void) + +static inline u16 get_part_number(void) { - unsigned int jtag_id = __raw_readl(KS2_JTAG_ID_REG); - unsigned int part_no = (jtag_id >> 12) & 0xffff; + u32 jtag_id = __raw_readl(KS2_JTAG_ID_REG); - return (part_no == 0xb981) ? 1 : 0; + return (jtag_id & JTAGID_PART_NUM_MASK) >> JTAGID_PART_NUM_SHIFT; } -static inline int cpu_is_k2e(void) +static inline u8 cpu_is_k2hk(void) { - unsigned int jtag_id = __raw_readl(KS2_JTAG_ID_REG); - unsigned int part_no = (jtag_id >> 12) & 0xffff; - - return (part_no == 0xb9a6) ? 1 : 0; + return get_part_number() == CPU_66AK2Hx; } -static inline int cpu_is_k2l(void) +static inline u8 cpu_is_k2e(void) { - unsigned int jtag_id = __raw_readl(KS2_JTAG_ID_REG); - unsigned int part_no = (jtag_id >> 12) & 0xffff; + return get_part_number() == CPU_66AK2Ex; +} - return (part_no == 0xb9a7) ? 1 : 0; +static inline u8 cpu_is_k2l(void) +{ + return get_part_number() == CPU_66AK2Lx; } -static inline int cpu_revision(void) +static inline u8 cpu_revision(void) { - unsigned int jtag_id = __raw_readl(KS2_JTAG_ID_REG); - unsigned int rev = (jtag_id >> 28) & 0xf; + u32 jtag_id = __raw_readl(KS2_JTAG_ID_REG); + u8 rev = (jtag_id & JTAGID_VARIANT_MASK) & JTAGID_VARIANT_SHIFT; return rev; }