From patchwork Mon Jul 20 17:49:25 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vladimir Barinov X-Patchwork-Id: 497828 X-Patchwork-Delegate: iwamatsu@nigauri.org Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id B2C07140D31 for ; Tue, 21 Jul 2015 03:49:37 +1000 (AEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 2CCF04B62A; Mon, 20 Jul 2015 19:49:36 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id kwF6vSvs4M1Z; Mon, 20 Jul 2015 19:49:35 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id A8B354B615; Mon, 20 Jul 2015 19:49:35 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 557DB4B615 for ; Mon, 20 Jul 2015 19:49:33 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id zYFOIKrydeBi for ; Mon, 20 Jul 2015 19:49:33 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail-wi0-f170.google.com (mail-wi0-f170.google.com [209.85.212.170]) by theia.denx.de (Postfix) with ESMTPS id 2C5914A039 for ; Mon, 20 Jul 2015 19:49:30 +0200 (CEST) Received: by wibud3 with SMTP id ud3so93841693wib.1 for ; Mon, 20 Jul 2015 10:49:30 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references; bh=m06OZxNhTBHZibaqswaoxJH8gPRVBjsThSGV/4RQcG4=; b=Kex3gseFTDbALTkdNWFnVfTu1DbmA8P3EMd7Smzuc1eWUwwNdFmB3m0hjVjSynh4Xp 1IJuwokAzW+7dDAssiuPQccvVnl0HJVqI5tV2xCKGLCb0wq8F3rMajiXZLYbLXSmpuRb RDsD1fTYrJftrK+/PrkNd3spwEZVR0/XmbjDwIwwPu8JnKTjEwVHA5SjHRtGO1MZHIKc 4Ypn1meKwwY1s3HiR0PRiovbhRh6WE4UY4nsmc4jt5VU4vNUbsZhfAClWzHm/sbIWSTp eXRM6boKkEPN4VbnRb9KQMYn0tqT9zh+sNJIA8GKkXm26gboTKSPmZO0hXHmkYklRQjq PRLA== X-Gm-Message-State: ALoCoQkzPshuP4ZUOSW9Dm3Pt9YrL8HEcTXJb68R4M+x2amwZwd1bcHHAMDa4zDCSL0pC8B1VTui X-Received: by 10.194.89.98 with SMTP id bn2mr62776330wjb.153.1437414570102; Mon, 20 Jul 2015 10:49:30 -0700 (PDT) Received: from opad.zte.com.cn ([78.155.53.86]) by smtp.gmail.com with ESMTPSA id z9sm12865613wiv.9.2015.07.20.10.49.28 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 20 Jul 2015 10:49:29 -0700 (PDT) From: Vladimir Barinov To: u-boot@lists.denx.de, Nobuhiro Iwamatsu Date: Mon, 20 Jul 2015 20:49:25 +0300 Message-Id: <1437414565-662-1-git-send-email-vladimir.barinov@cogentembedded.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1437414521-611-1-git-send-email-vladimir.barinov@cogentembedded.com> References: <1437414521-611-1-git-send-email-vladimir.barinov@cogentembedded.com> Subject: [U-Boot] [PATCH 1/4] gpio: sh-pfc: fix gpio input read X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.15 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Fix gpio_read: gpio input (INDT) and gpio output (OUTDT) registers have different offset. gpio_read must be performed from INDT. Signed-off-by: Vladimir Barinov --- drivers/gpio/sh_pfc.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpio/sh_pfc.c b/drivers/gpio/sh_pfc.c index 7a5af20..95f5b2a 100644 --- a/drivers/gpio/sh_pfc.c +++ b/drivers/gpio/sh_pfc.c @@ -75,7 +75,8 @@ static int gpio_read_bit(struct pinmux_data_reg *dr, debug("read_bit: addr = %lx, pos = %ld, " "r_width = %ld\n", dr->reg, pos, dr->reg_width); - return (gpio_read_raw_reg(dr->mapped_reg, dr->reg_width) >> pos) & 1; + return + (gpio_read_raw_reg(dr->mapped_reg + 0x4, dr->reg_width) >> pos) & 1; } static void gpio_write_bit(struct pinmux_data_reg *dr,