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[U-Boot,PATCHv4,3/3] arm: socfpga: spl: update peripheral pll for dev kit

Message ID 1429134273-30544-4-git-send-email-dinguyen@opensource.altera.com
State Accepted
Delegated to: Marek Vasut
Headers show

Commit Message

Dinh Nguyen April 15, 2015, 9:44 p.m. UTC
From: Dinh Nguyen <dinguyen@opensource.altera.com>

"commit 0d13a0051b2c arm: socfpga: Sync Cyclone V DK PLL configuration"
mistakenly changed CONFIG_HPS_MAINPLLGRP_VCO_NUMER to 39, the correct
value should be 79.

Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
---
 board/altera/socfpga/pll_config.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
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Patch

diff --git a/board/altera/socfpga/pll_config.h b/board/altera/socfpga/pll_config.h
index 8130fa4..7cd25df 100644
--- a/board/altera/socfpga/pll_config.h
+++ b/board/altera/socfpga/pll_config.h
@@ -36,7 +36,7 @@ 
 
 /* Peripheral PLL */
 #define CONFIG_HPS_PERPLLGRP_VCO_DENOM			(1)
-#define CONFIG_HPS_PERPLLGRP_VCO_NUMER			(39)
+#define CONFIG_HPS_PERPLLGRP_VCO_NUMER			(79)
 /*
  * To tell where is the VCOs source:
  * 0 = EOSC1