From patchwork Sat Mar 21 02:28:31 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: York Sun X-Patchwork-Id: 452884 X-Patchwork-Delegate: yorksun@freescale.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 0B44114009B for ; Sat, 21 Mar 2015 13:32:23 +1100 (AEDT) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 1E6344A04E; Sat, 21 Mar 2015 03:31:43 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id DF0akTga2TP0; Sat, 21 Mar 2015 03:31:42 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id DF6EFABD38; Sat, 21 Mar 2015 03:30:03 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 419354B62C for ; Sat, 21 Mar 2015 03:29:31 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id ZWtFFQfpaa_s for ; Sat, 21 Mar 2015 03:29:31 +0100 (CET) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from na01-bn1-obe.outbound.protection.outlook.com (mail-bn1bn0102.outbound.protection.outlook.com [157.56.110.102]) by theia.denx.de (Postfix) with ESMTPS id 367414B689 for ; Sat, 21 Mar 2015 03:29:02 +0100 (CET) Received: from CH1PR03CA001.namprd03.prod.outlook.com (10.255.156.146) by BN1PR03MB154.namprd03.prod.outlook.com (10.255.201.18) with Microsoft SMTP Server (TLS) id 15.1.112.19; Sat, 21 Mar 2015 02:28:59 +0000 Received: from BN1AFFO11FD010.protection.gbl (10.255.156.132) by CH1PR03CA001.outlook.office365.com (10.255.156.146) with Microsoft SMTP Server (TLS) id 15.1.118.21 via Frontend Transport; Sat, 21 Mar 2015 02:28:59 +0000 Received: from tx30smr01.am.freescale.net (192.88.168.50) by BN1AFFO11FD010.mail.protection.outlook.com (10.58.52.70) with Microsoft SMTP Server (TLS) id 15.1.125.13 via Frontend Transport; Sat, 21 Mar 2015 02:28:59 +0000 Received: from oslab-l1.am.freescale.net ([10.214.86.234]) by tx30smr01.am.freescale.net (8.14.3/8.14.0) with ESMTP id t2L2Sd3Y021875; Fri, 20 Mar 2015 19:28:58 -0700 From: York Sun To: Date: Fri, 20 Mar 2015 19:28:31 -0700 Message-ID: <1426904912-29186-28-git-send-email-yorksun@freescale.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1426904912-29186-1-git-send-email-yorksun@freescale.com> References: <1426904912-29186-1-git-send-email-yorksun@freescale.com> X-EOPAttributedMessage: 0 Received-SPF: Fail (protection.outlook.com: domain of freescale.com does not designate 192.88.168.50 as permitted sender) receiver=protection.outlook.com; client-ip=192.88.168.50; helo=tx30smr01.am.freescale.net; Authentication-Results: spf=fail (sender IP is 192.88.168.50) smtp.mailfrom=yorksun@freescale.com; freescale.mail.onmicrosoft.com; dkim=none (message not signed) header.d=none; X-Forefront-Antispam-Report: CIP:192.88.168.50; CTRY:US; IPV:NLI; EFV:NLI; BMV:1; SFV:NSPM; SFS:(10019020)(979002)(6009001)(339900001)(189002)(199003)(86362001)(85426001)(19580405001)(76176999)(46102003)(6806004)(19580395003)(50986999)(77096005)(47776003)(50226001)(87936001)(92566002)(50466002)(48376002)(77156002)(62966003)(2950100001)(450100001)(104016003)(33646002)(105606002)(106466001)(110136001)(2351001)(229853001)(36756003)(969003)(989001)(999001)(1009001)(1019001); DIR:OUT; SFP:1102; SCL:1; SRVR:BN1PR03MB154; H:tx30smr01.am.freescale.net; FPR:; SPF:Fail; MLV:ovrnspm; MX:1; A:1; PTR:InfoDomainNonexistent; LANG:; MIME-Version: 1.0 X-Microsoft-Antispam: UriScan:;BCL:0;PCL:0;RULEID:;SRVR:BN1PR03MB154; X-Microsoft-Antispam-PRVS: X-Exchange-Antispam-Report-Test: UriScan:; X-Exchange-Antispam-Report-CFA-Test: BCL:0; PCL:0; RULEID:(601004)(5002010)(5005006); SRVR:BN1PR03MB154; BCL:0; PCL:0; RULEID:; SRVR:BN1PR03MB154; X-Forefront-PRVS: 05220145DE X-OriginatorOrg: freescale.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 21 Mar 2015 02:28:59.1090 (UTC) X-MS-Exchange-CrossTenant-Id: 710a03f5-10f6-4d38-9ff4-a80b81da590d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=710a03f5-10f6-4d38-9ff4-a80b81da590d; Ip=[192.88.168.50]; Helo=[tx30smr01.am.freescale.net] X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BN1PR03MB154 Cc: York Sun , Yangbo Lu Subject: [U-Boot] [PATCH v5 27/28] ls2085a: esdhc: Add esdhc support for ls2085a X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.15 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" From: Yangbo Lu This patch adds esdhc support for ls2085a. Signed-off-by: Yangbo Lu Signed-off-by: York Sun --- Changes in v5: None Changes in v4: None Changes in v3: None Changes in v2: None arch/arm/cpu/armv8/fsl-lsch3/cpu.c | 10 +++++++ arch/arm/cpu/armv8/fsl-lsch3/fdt.c | 7 +++++ arch/arm/include/asm/arch-fsl-lsch3/config.h | 2 ++ drivers/mmc/fsl_esdhc.c | 36 ++++++++++++++++++++++++-- include/configs/ls2085a_common.h | 5 ++-- include/configs/ls2085aqds.h | 19 +++++++++++++- include/configs/ls2085ardb.h | 11 +++++++- include/fsl_esdhc.h | 4 +++ 8 files changed, 88 insertions(+), 6 deletions(-) diff --git a/arch/arm/cpu/armv8/fsl-lsch3/cpu.c b/arch/arm/cpu/armv8/fsl-lsch3/cpu.c index 22b5fb2..e738c49 100644 --- a/arch/arm/cpu/armv8/fsl-lsch3/cpu.c +++ b/arch/arm/cpu/armv8/fsl-lsch3/cpu.c @@ -13,6 +13,9 @@ #include #include #include +#ifdef CONFIG_FSL_ESDHC +#include +#endif #include "cpu.h" #include "mp.h" #include "speed.h" @@ -416,6 +419,13 @@ int print_cpuinfo(void) } #endif +#ifdef CONFIG_FSL_ESDHC +int cpu_mmc_init(bd_t *bis) +{ + return fsl_esdhc_mmc_init(bis); +} +#endif + int cpu_eth_init(bd_t *bis) { int error = 0; diff --git a/arch/arm/cpu/armv8/fsl-lsch3/fdt.c b/arch/arm/cpu/armv8/fsl-lsch3/fdt.c index 42c5b58..d370023 100644 --- a/arch/arm/cpu/armv8/fsl-lsch3/fdt.c +++ b/arch/arm/cpu/armv8/fsl-lsch3/fdt.c @@ -7,6 +7,9 @@ #include #include #include +#ifdef CONFIG_FSL_ESDHC +#include +#endif #include "mp.h" #ifdef CONFIG_MP @@ -65,4 +68,8 @@ void ft_cpu_setup(void *blob, bd_t *bd) do_fixup_by_compat_u32(blob, "fsl,ns16550", "clock-frequency", CONFIG_SYS_NS16550_CLK, 1); #endif + +#if defined(CONFIG_FSL_ESDHC) + fdt_fixup_esdhc(blob, bd); +#endif } diff --git a/arch/arm/include/asm/arch-fsl-lsch3/config.h b/arch/arm/include/asm/arch-fsl-lsch3/config.h index 77c20ab..ca8d38c 100644 --- a/arch/arm/include/asm/arch-fsl-lsch3/config.h +++ b/arch/arm/include/asm/arch-fsl-lsch3/config.h @@ -31,6 +31,7 @@ #define CONFIG_SYS_FSL_CH3_CLK_GRPA_ADDR (CONFIG_SYS_IMMR + 0x00300000) #define CONFIG_SYS_FSL_CH3_CLK_GRPB_ADDR (CONFIG_SYS_IMMR + 0x00310000) #define CONFIG_SYS_FSL_CH3_CLK_CTRL_ADDR (CONFIG_SYS_IMMR + 0x00370000) +#define CONFIG_SYS_FSL_ESDHC_ADDR (CONFIG_SYS_IMMR + 0x01140000) #define CONFIG_SYS_IFC_ADDR (CONFIG_SYS_IMMR + 0x01240000) #define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_IMMR + 0x011C0500) #define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_IMMR + 0x011C0600) @@ -110,6 +111,7 @@ #define CONFIG_MAX_MEM_MAPPED CONFIG_SYS_LS2_DDR_BLOCK1_SIZE #define CONFIG_SYS_FSL_DDR_VER FSL_DDR_VER_5_0 +#define CONFIG_SYS_FSL_ESDHC_LE /* IFC */ #define CONFIG_SYS_FSL_IFC_LE #define CONFIG_SYS_MEMAC_LITTLE_ENDIAN diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c index c5e270d..7528b9d 100644 --- a/drivers/mmc/fsl_esdhc.c +++ b/drivers/mmc/fsl_esdhc.c @@ -105,7 +105,8 @@ static uint esdhc_xfertyp(struct mmc_cmd *cmd, struct mmc_data *data) else if (cmd->resp_type & MMC_RSP_PRESENT) xfertyp |= XFERTYP_RSPTYP_48; -#if defined(CONFIG_MX53) || defined(CONFIG_PPC_T4240) || defined(CONFIG_LS102XA) +#if defined(CONFIG_MX53) || defined(CONFIG_PPC_T4240) || \ + defined(CONFIG_LS102XA) || defined(CONFIG_LS2085A) if (cmd->cmdidx == MMC_CMD_STOP_TRANSMISSION) xfertyp |= XFERTYP_CMDTYP_ABORT; #endif @@ -183,7 +184,9 @@ static int esdhc_setup_data(struct mmc *mmc, struct mmc_data *data) int timeout; struct fsl_esdhc_cfg *cfg = mmc->priv; struct fsl_esdhc *regs = (struct fsl_esdhc *)cfg->esdhc_base; - +#ifdef CONFIG_LS2085A + dma_addr_t addr; +#endif uint wml_value; wml_value = data->blocksize/4; @@ -194,8 +197,16 @@ static int esdhc_setup_data(struct mmc *mmc, struct mmc_data *data) esdhc_clrsetbits32(®s->wml, WML_RD_WML_MASK, wml_value); #ifndef CONFIG_SYS_FSL_ESDHC_USE_PIO +#ifdef CONFIG_LS2085A + addr = virt_to_phys((void *)(data->dest)); + if (upper_32_bits(addr)) + printf("Error found for upper 32 bits\n"); + else + esdhc_write32(®s->dsaddr, lower_32_bits(addr)); +#else esdhc_write32(®s->dsaddr, (u32)data->dest); #endif +#endif } else { #ifndef CONFIG_SYS_FSL_ESDHC_USE_PIO flush_dcache_range((ulong)data->src, @@ -212,8 +223,16 @@ static int esdhc_setup_data(struct mmc *mmc, struct mmc_data *data) esdhc_clrsetbits32(®s->wml, WML_WR_WML_MASK, wml_value << 16); #ifndef CONFIG_SYS_FSL_ESDHC_USE_PIO +#ifdef CONFIG_LS2085A + addr = virt_to_phys((void *)(data->src)); + if (upper_32_bits(addr)) + printf("Error found for upper 32 bits\n"); + else + esdhc_write32(®s->dsaddr, lower_32_bits(addr)); +#else esdhc_write32(®s->dsaddr, (u32)data->src); #endif +#endif } esdhc_write32(®s->blkattr, data->blocks << 16 | data->blocksize); @@ -259,10 +278,23 @@ static int esdhc_setup_data(struct mmc *mmc, struct mmc_data *data) static void check_and_invalidate_dcache_range (struct mmc_cmd *cmd, struct mmc_data *data) { +#ifdef CONFIG_LS2085A + unsigned start = 0; +#else unsigned start = (unsigned)data->dest ; +#endif unsigned size = roundup(ARCH_DMA_MINALIGN, data->blocks*data->blocksize); unsigned end = start+size ; +#ifdef CONFIG_LS2085A + dma_addr_t addr; + + addr = virt_to_phys((void *)(data->dest)); + if (upper_32_bits(addr)) + printf("Error found for upper 32 bits\n"); + else + start = lower_32_bits(addr); +#endif invalidate_dcache_range(start, end); } #endif diff --git a/include/configs/ls2085a_common.h b/include/configs/ls2085a_common.h index 9bc3869..54c4e5c 100644 --- a/include/configs/ls2085a_common.h +++ b/include/configs/ls2085a_common.h @@ -155,6 +155,9 @@ unsigned long long get_qixis_addr(void); #define QIXIS_BASE get_qixis_addr() #define QIXIS_BASE_PHYS 0x20000000 #define QIXIS_BASE_PHYS_EARLY 0xC000000 +#define QIXIS_STAT_PRES1 0xb +#define QIXIS_SDID_MASK 0x07 +#define QIXIS_ESDHC_NO_ADAPTER 0x7 #define CONFIG_SYS_NAND_BASE 0x530000000ULL #define CONFIG_SYS_NAND_BASE_PHYS 0x30000000 @@ -219,8 +222,6 @@ unsigned long long get_qixis_addr(void); #define CONFIG_CMD_BOOTD #define CONFIG_CMD_ECHO #define CONFIG_CMD_SOURCE -#define CONFIG_CMD_FAT -#define CONFIG_DOS_PARTITION /* Miscellaneous configurable options */ #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_DDR_SDRAM_BASE + 0x10000000) diff --git a/include/configs/ls2085aqds.h b/include/configs/ls2085aqds.h index 7307a59..1de387a 100644 --- a/include/configs/ls2085aqds.h +++ b/include/configs/ls2085aqds.h @@ -278,6 +278,14 @@ unsigned long get_board_ddr_clk(void); #define I2C_MUX_CH_DEFAULT 0x8 /* + * MMC + */ +#ifdef CONFIG_MMC +#define CONFIG_ESDHC_DETECT_QUIRK ((readb(QIXIS_BASE + QIXIS_STAT_PRES1) & \ + QIXIS_SDID_MASK) != QIXIS_ESDHC_NO_ADAPTER) +#endif + +/* * RTC configuration */ #define RTC @@ -307,7 +315,16 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_CMD_NET #endif - +/* MMC */ +#define CONFIG_MMC +#ifdef CONFIG_MMC +#define CONFIG_CMD_MMC +#define CONFIG_FSL_ESDHC +#define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33 +#define CONFIG_GENERIC_MMC +#define CONFIG_CMD_FAT +#define CONFIG_DOS_PARTITION +#endif /* Initial environment variables */ #undef CONFIG_EXTRA_ENV_SETTINGS diff --git a/include/configs/ls2085ardb.h b/include/configs/ls2085ardb.h index e97f054..d87532a 100644 --- a/include/configs/ls2085ardb.h +++ b/include/configs/ls2085ardb.h @@ -280,7 +280,16 @@ unsigned long get_board_sys_clk(void); #define CONFIG_CMD_NET #endif - +/* MMC */ +#define CONFIG_MMC +#ifdef CONFIG_MMC +#define CONFIG_CMD_MMC +#define CONFIG_FSL_ESDHC +#define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33 +#define CONFIG_GENERIC_MMC +#define CONFIG_CMD_FAT +#define CONFIG_DOS_PARTITION +#endif /* Initial environment variables */ #undef CONFIG_EXTRA_ENV_SETTINGS diff --git a/include/fsl_esdhc.h b/include/fsl_esdhc.h index 57295b4..41bf05b 100644 --- a/include/fsl_esdhc.h +++ b/include/fsl_esdhc.h @@ -158,7 +158,11 @@ #define ESDHC_VENDORSPEC_VSELECT 0x00000002 /* Use 1.8V */ struct fsl_esdhc_cfg { +#ifdef CONFIG_LS2085A + u64 esdhc_base; +#else u32 esdhc_base; +#endif u32 sdhc_clk; u8 max_bus_width; struct mmc_config cfg;