From patchwork Mon Mar 9 13:48:48 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Behme Dirk (CM/ESO2)" X-Patchwork-Id: 448016 X-Patchwork-Delegate: sbabic@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id A391714010F for ; Tue, 10 Mar 2015 00:55:58 +1100 (AEDT) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 696B1A7422; Mon, 9 Mar 2015 14:55:54 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id GfwQpQkZrlEm; Mon, 9 Mar 2015 14:55:54 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 82D6DA741C; Mon, 9 Mar 2015 14:55:53 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 55DE7A741C for ; Mon, 9 Mar 2015 14:55:49 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id OBS6enzYgofj for ; Mon, 9 Mar 2015 14:55:49 +0100 (CET) X-Greylist: delayed 409 seconds by postgrey-1.34 at theia; Mon, 09 Mar 2015 14:55:45 CET X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from imta22.fe.bosch.de (imta22.fe.bosch.de [139.15.243.26]) by theia.denx.de (Postfix) with ESMTPS id 1101CA741B for ; Mon, 9 Mar 2015 14:55:45 +0100 (CET) Received: from smtp6-v.fe.bosch.de (imta23.fe.bosch.de [139.15.243.227]) by imta22.fe.bosch.de (Postfix) with ESMTP id 120B48404F4 for ; Mon, 9 Mar 2015 14:48:56 +0100 (CET) Received: from vsmta14.fe.internet.bosch.com (unknown [10.4.98.54]) by imta23.fe.bosch.de (Postfix) with ESMTP id 8C96115801AC for ; Mon, 9 Mar 2015 14:48:52 +0100 (CET) Received: from SI-HUB1001.de.bosch.com (vsgw24.fe.internet.bosch.com [10.4.98.24]) by vsmta14.fe.internet.bosch.com (Postfix) with ESMTP id 43274A408B6 for ; Mon, 9 Mar 2015 14:48:52 +0100 (CET) Received: from hi-z5661.hi.de.bosch.com (10.34.211.28) by SI-HUB1001.de.bosch.com (10.4.103.108) with Microsoft SMTP Server id 14.3.195.1; Mon, 9 Mar 2015 14:48:51 +0100 Received: from hi-z5661.hi.de.bosch.com (localhost [127.0.0.1]) by hi-z5661.hi.de.bosch.com (Postfix) with ESMTP id 6F9AA41122; Mon, 9 Mar 2015 14:48:51 +0100 (CET) From: Dirk Behme To: Date: Mon, 9 Mar 2015 14:48:48 +0100 Message-ID: <1425908928-11998-1-git-send-email-dirk.behme@de.bosch.com> X-Mailer: git-send-email 1.8.2 MIME-Version: 1.0 X-TM-AS-MML: disable X-TM-AS-Product-Ver: IMSS-7.1.0.1679-7.5.0.1018-21386.007 X-TMASE-MatchedRID: VuLOHJTiUUpAEjf8JRFbHHTnOygHVQpOmdrHMkUHHq+/NvO7pUgkLRF7 EuN9tZK6RAjjCBWd1tUaFVw7sdMuf70gOq/h1WW6A9lly13c/gHrMzI9rN7ar2tEzrC9eANptlo lH3QPrXbi8zVgXoAltsIJ+4gwXrEtJ0RPnyOnrZKdJsIF3UgYWYJt2kUK9BQ2H8OcNm88PjvDc4 OdXg9aFwyvHTaLWU+dZycorJW1+rZgswLfzDd2feAHZnLKnQjqRctqTcb58+NcKRK3DM/KmiQGd l1tQI7t0/5HQxvVB1U0+aGhUx8J2mlvyA1GNPX1 Cc: Dirk Behme Subject: [U-Boot] [PATCH] mx6: soc: Switch to cold reset X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.15 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Disable the warm reset and enable the cold reset for a more reliable restart ('reset'). This is taken from the Linux kernel, see imx_src_init() in arch/arm/mach-imx/src.c. Signed-off-by: Dirk Behme --- arch/arm/cpu/armv7/mx6/soc.c | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/arch/arm/cpu/armv7/mx6/soc.c b/arch/arm/cpu/armv7/mx6/soc.c index 5f5f497..12be6ff 100644 --- a/arch/arm/cpu/armv7/mx6/soc.c +++ b/arch/arm/cpu/armv7/mx6/soc.c @@ -267,6 +267,22 @@ static void set_preclk_from_osc(void) } #endif +#define SRC_SCR_WARM_RESET_ENABLE 0 + +static void init_src(void) +{ + struct src *src_regs = (struct src *)SRC_BASE_ADDR; + u32 val; + + /* + * force warm reset sources to generate cold reset + * for a more reliable restart + */ + val = readl(&src_regs->scr); + val &= ~(1 << SRC_SCR_WARM_RESET_ENABLE); + writel(val, &src_regs->scr); +} + int arch_cpu_init(void) { init_aips(); @@ -294,6 +310,8 @@ int arch_cpu_init(void) mxs_dma_init(); #endif + init_src(); + return 0; }