From patchwork Sun Mar 8 06:09:41 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stephen Warren X-Patchwork-Id: 447932 X-Patchwork-Delegate: marek.vasut@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 111E314012F for ; Mon, 9 Mar 2015 18:48:04 +1100 (AEDT) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id B094FAB957; Mon, 9 Mar 2015 08:43:37 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id e7plxH1zJdwz; Mon, 9 Mar 2015 08:43:37 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id F375FAB95C; Mon, 9 Mar 2015 08:39:40 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 65DD7A741C for ; Sun, 8 Mar 2015 07:09:53 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id Bc2b2rvJq1pU for ; Sun, 8 Mar 2015 07:09:53 +0100 (CET) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from avon.wwwdotorg.org (avon.wwwdotorg.org [70.85.31.133]) by theia.denx.de (Postfix) with ESMTPS id 133B3A741A for ; Sun, 8 Mar 2015 07:09:50 +0100 (CET) Received: from severn.wwwdotorg.org (unknown [192.168.65.5]) (using TLSv1 with cipher ADH-AES256-SHA (256/256 bits)) (No client certificate requested) by avon.wwwdotorg.org (Postfix) with ESMTPS id AB4776314; Sat, 7 Mar 2015 23:09:48 -0700 (MST) Received: from dart.wwwdotorg.org (localhost [127.0.0.1]) (using TLSv1 with cipher AES128-SHA (128/128 bits)) (No client certificate requested) by severn.wwwdotorg.org (Postfix) with ESMTPSA id 1C450E40F1; Sat, 7 Mar 2015 23:09:48 -0700 (MST) From: Stephen Warren To: u-boot@lists.denx.de, Marek Vasut Date: Sat, 7 Mar 2015 23:09:41 -0700 Message-Id: <1425794981-32621-1-git-send-email-swarren@wwwdotorg.org> X-Mailer: git-send-email 1.9.1 X-NVConfidentiality: public X-Virus-Scanned: clamav-milter 0.98.1 at avon.wwwdotorg.org X-Virus-Status: Clean Subject: [U-Boot] [PATCH] usb: dwc2: fix aligned buffer usage X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.15 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" The original aligned_buffer usage: a) Uselessly copied data into the aligned buffer even for IN transactions. b) Needlessly split the memcpy() into separate calls per chunk, rather than doing it all at once, as it did for the post-transfer copy for IN transactions. c) Always programmed the HW to transfer to/from the start of the aligned buffer, rather than the location of the start of the current chunk. This worked fine for OUT transactions since the memcpy copied the data to this location. However, for large IN transactions, it resulted in each transfer over-writing the data for the first transfer. This patch assumes that the USB maxpacket is at least 8, so that each chunk of the overall transfer is still aligned to the HW's 8-byte alignment requirement. Signed-off-by: Stephen Warren --- drivers/usb/host/dwc2.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/drivers/usb/host/dwc2.c b/drivers/usb/host/dwc2.c index 5a1c44a8fb75..5bb9df86735f 100644 --- a/drivers/usb/host/dwc2.c +++ b/drivers/usb/host/dwc2.c @@ -764,6 +764,9 @@ int chunk_msg(struct usb_device *dev, unsigned long pipe, int *pid, int in, return -EINVAL; } + if (!in) + memcpy(aligned_buffer, (char *)buffer, len); + do { /* Initialize channel */ dwc_otg_hc_init(regs, DWC2_HC_CHANNEL, devnum, ep, in, eptype, @@ -795,8 +798,7 @@ int chunk_msg(struct usb_device *dev, unsigned long pipe, int *pid, int in, (*pid << DWC2_HCTSIZ_PID_OFFSET), &hc_regs->hctsiz); - memcpy(aligned_buffer, (char *)buffer + done, len - done); - writel((uint32_t)aligned_buffer, &hc_regs->hcdma); + writel((uint32_t)&aligned_buffer[done], &hc_regs->hcdma); /* Set host channel enable after all other setup is complete. */ clrsetbits_le32(&hc_regs->hcchar, DWC2_HCCHAR_MULTICNT_MASK |